MACHLV210-24 データシートの表示（PDF） - Lattice Semiconductor

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MACHLV210-24

High Density EE CMOS Programmable Logic

Lattice Semiconductor 

ORDERING INFORMATION

Industrial Products

Programmable logic products for industrial applications are available with several ordering options. The order number (Valid

Combination) is formed by a combination of:

MACH LV 210 -18 J I

FAMILY TYPE

MACH = Macro Array CMOS High-Speed

TECHNOLOGY

LV = Low Voltage

DEVICE NUMBER

210 = 64 Macrocells, 44 Pins, Input Pull-Up/Pull-Down

Resistors

SPEED

-18 = 18 ns tPD

-24 = 24 ns tPD

OPTIONAL PROCESSING

Blank = Standard Processing

OPERATING CONDITIONS

I = Industrial (–40°C to +85°C)

PACKAGE TYPE

J = 44-Pin Plastic Leaded Chip

Carrier (PL 044)

Valid Combinations

MACHLV210-18

JI

MACHLV210-24

Valid Combinations

Valid Combinations list configurations planned to be

supported in volume for this device. Consult your local

sales office to confirm availability of specific

valid combinations and to check on newly released

combinations.

MACHLV210-18/24 (Ind)

5

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