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LTC1435I データシートの表示(PDF) - Linear Technology

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LTC1435I Datasheet PDF : 20 Pages
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U
OPERATION (Refer to Functional Diagram)
Main Control Loop
The LTC1435 uses a constant frequency, current mode
step-down architecture. During normal operation, the top
MOSFET is turned on each cycle when the oscillator sets
the RS latch, and turned off when the main current
comparator I1 resets the RS latch. The peak inductor
current at which I1 resets the RS latch is controlled by the
voltage on the ITH pin , which is the output of error amplifier
EA. The VOSENSE pin, described in the Pin Functions
section, allows EA to receive an output feedback voltage
VFB from an external resistive divider. When the load
current increases, it causes a slight decrease in VFB
relative to the 1.19V reference, which in turn causes the ITH
voltage to increase until the average inductor current
matches the new load current. While the top MOSFET is
off, the bottom MOSFET is turned on until either the
inductor current starts to reverse, as indicated by current
comparator I2, or the beginning of the next cycle.
The top MOSFET driver is biased from floating bootstrap
capacitor CB, which normally is recharged during each off
cycle. However, when VIN decreases to a voltage close to
VOUT, the loop may enter dropout and attempt to turn on
the top MOSFET continuously. The dropout detector counts
the number of oscillator cycles that the top MOSFET
remains on and periodically forces a brief off period to
allow CB to recharge.
The main control loop is shut down by pulling the RUN/SS
pin low. Releasing RUN/SS allows an internal 3µA current
source to charge soft start capacitor CSS. When CSS
reaches 1.3V, the main control loop is enabled with the ITH
voltage clamped at approximately 30% of its maximum
value. As CSS continues to charge, ITH is gradually re-
leased allowing normal operation to resume.
Comparator OV guards against transient overshoots
> 7.5% by turning off the top MOSFET and keeping it off
until the fault is removed.
LTC1435
Low Current Operation
The LTC1435 is capable of Burst Mode operation in which
the external MOSFETs operate intermittently based on
load demand. The transition to low current operation
begins when comparator I2 detects current reversal and
turns off the bottom MOSFET. If the voltage across RSENSE
does not exceed the hysteresis of I2 (approximately 20mV)
for one full cycle, then on following cycles the top and
bottom drives are disabled. This continues until an induc-
tor current peak exceeds 20mV/RSENSE or the ITH voltage
exceeds 0.6V, either of which causes drive to be returned
to the TG pin on the next cycle.
Two conditions can force continuous synchronous opera-
tion, even when the load current would otherwise dictate
low current operation. One is when the common mode
voltage of the SENSE+ and SENSE pins is below 1.4V and
the other is when the SFB pin is below 1.19V. The latter
condition is used to assist in secondary winding regulation
as described in the Applications Information section.
INTVCC/EXTVCC Power
Power for the top and bottom MOSFET drivers and most
of the other LTC1435 circuitry is derived from the INTVCC
pin. The bottom MOSFET driver supply pin is internally
connected to INTVCC in the LTC1435. When the EXTVCC
pin is left open, an internal 5V low dropout regulator
supplies INTVCC power. If EXTVCC is taken above 4.8V,
the 5V regulator is turned off and an internal switch is
turned on to connect EXTVCC to INTVCC. This allows the
INTVCC power to be derived from a high efficiency
external source such as the output of the regulator itself
or a secondary winding, as described in the Applications
Information section.
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