M50FW002 データシートの表示（PDF） - STMicroelectronics
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M50FW002 Datasheet PDF : 39 Pages
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M50FW002
Table 20. Clock Characteristics (FWH Interface)
Symbol
Parameter
Test Condition
Value
Unit
tCYC
CLK Cycle Time(1)
Min
30
ns
tHIGH CLK High Time
Min
11
ns
tLOW
CLK Low Time
Min
11
ns
CLK Slew Rate
Min
1
peak to peak
Max
4
V/ns
V/ns
Note: 1. Devices on the PCI Bus must work with any clock frequency between DC and 33MHz. Below 16MHz devices may be guaranteed
by design rather than tested. Refer to PCI Specification.
Figure 9. Clock Waveform (FWH Interface)
0.6 VCC
0.5 VCC
0.4 VCC
0.3 VCC
0.2 VCC
tHIGH
tCYC
tLOW
0.4 VCC, p-to-p
(minimum)
AI03403
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