HD74CDCV857A データシートの表示（PDF） - Renesas Electronics

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HD74CDCV857A

2.5-V Phase-lock Loop Clock Driver

Renesas Electronics 

HD74CDCV857A

Differential clock outputs are directly terminated by a 120 Ω resistor. Figure 2 is typical usage conditions

of outputs load.

V DDQ

Device

under OUT

test

OUT

V DDQ

RT=

120 Ω

C = 14 pF

C = 14 pF

Figure 2 Differential signal using direct termination resistor

CLKIN

CLKIN

FBIN

FBIN

tSPE

Figure 3 Static phase offset

FBOUT

FBOUT

Yx

Yx

tsk

Yx

Yx

Yx'

Yx'

tsk

Figure 4 Output skew

Rev.3.00, Oct.09.2003, page 9 of 12

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