LTC1061(RevC) データシートの表示（PDF） - Linear Technology
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LTC1061 Datasheet PDF : 16 Pages
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ODES OF OPERATIO
LTC1061
STANDARD 1%
0
RESISTOR VALUES
–10
R11 = 39.2k
R31 = 13.7k
R21 = 10k
R41 = 39.2k
–20
Rh1 = 20.5k
Rl1 = 12.4k
R22 = 10k
R32 = 26.7k
–30
R42 = 14k
Rh2 = 32.4k
–40
Rl2 = 11.8k
R33 = 100k
R23 = 10k
–50
NOTES: USE A 10pF ACROSS R42
–60
FOR fCLK > 1MHz.
THE ELLIPTIC LOWPASS FILTER
–70
HAS ONLY TWO NOTCHES IN THE
STOPBAND, AND IT OPERATES
–80
WITH A CLOCK TO CUTOFF
–90
FREQUENCY RATIO OF 50:1.
0 1 2 3 4 5 6 7 8 9 10
fIN (kHz)
1061 F15
Figure 15. Resistor Values and Amplitude Response of
the Topology of Figure 12.
passive ladder filters provide enough data to synthesize
the above filters. The measured amplitude response of
such a lowpass is shown in Figure 15 where the filter
output is taken out of side A’s Pin 1, Figure 12. The clock-
to-center frequency ratio can be either 50:1 or 100:1
because the last stage of the LTC1061 operates in Mode 1
with a center frequency very close to the overall cutoff
frequency of the lowpass filter.
In Figure 16, all three sides of the LTC1061 are connected
in Mode 3a. This topology is useful for elliptic highpass
and notch filters with clock-to-cutoff (or notch) frequency
ratio higher than 100:1. This is often required to extend the
allowed input signal frequency range and to avoid prema-
ture aliasing. Figure 16 is also a versatile, general purpose
architecture providing 3 notches and 4 pole pairs, and
there is no restriction on the location of the poles with
respect to the notch frequencies. The drawbacks, when
compared to Figure 12, are the use of an external op amp
and the increased number of the required external resis-
tors.
Figure 17 shows the measured frequency of a 6th order
highpass elliptic filter operating with 250:1 clock-to-cutoff
frequency ratio. With a 1MHz clock, for instance, the filter
yields a 4kHz cutoff frequency, thus allowing an input
frequency range beyond 100kHz. Band limiting can be
easily added by placing a capacitor across the feedback
resistor of the external op amp of Figure 16.
Rg
–
Rh3
Rl3
LT1056
+
VOUT
R43
R33
R23
T2Ll, CMOS
CLOCK INPUT
V+
VIN
1
20
2
19
3
18
4
17
5
16
LTC1061
6
15
7
14
8
13
9
12
10
11
Rl2
Rh2
R42
R32
R22
V – Rl1
R41
R31
R21
Rh1
R11
LTC1061 F16
Figure 16. Using an External Op Amp to Connect
all 3 Sides of the LTC1061 in Mode 3a.
0 fCLK = 250kHz
STANDARD 1%
RESISTOR VALUES
–10
–20
–30
–40
–50
–60
–70
–80
–90
0
R11 = 105k
R31 = 47.5k
Rh1 = 10k
R22 = 32.4k
R42 = 52.3k
Rl2 = 750k
R33 = 255k
Rh3 = 10k
Rg = 140k
R21 = 10k
R41 = 45.3k
Rl1 = 1.07M
R32 = 28.7k
Rh2 = 42.2k
R23 = 10k
R43 = 63.4k
Rl3 = 110k
NOTE: FOR CLOCK FREQUENCIES
BELOW 500kHz, USE A CAPACI-
TOR IN PARALLEL WITH R21
SUCH AS (1/2πR21C) ≅ fCLK/3.
0.5 1.0 1.5 2.0 2.5
fIN (kHz)
1061 F17
Figure 17. Measured Amplitude Response of the Topology of
Figure 16, Configured to Provide a 6th Order Elliptic Highpass
Filter Operating with a Clock-to-Cutoff Frequency Ratio of 250:1.
11
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