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M36W432BGZA データシートの表示(PDF) - STMicroelectronics

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M36W432BGZA Datasheet PDF : 66 Pages
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M36W432TG, M36W432BG
FUNCTIONAL DESCRIPTION
The Flash and SRAM components have separate
power supplies and grounds and are distinguished
by three chip enable inputs: EF for the Flash mem-
ory and, E1S and E2S for the SRAM.
Recommended operating conditions do not allow
both the Flash and the SRAM to be in active mode
at the same time. The most common example is
simultaneous read operations on the Flash and
the SRAM which would result in a data bus con-
tention. Therefore it is recommended to put the
SRAM in the high impedance state when reading
the Flash and vice versa (see Table 2 Main Oper-
ation Modes for details).
Figure 4. Functional Block Diagram
VDDF VDDQF VPPF
EF
GF
WF
RPF
WPF
A18-A20
A0-A17
Flash Memory
32 Mbit (x16)
VDDS
VSSF
DQ0-DQ15
E1S
E2S
GS
WS
UBS
LBS
SRAM
4 Mbit (x16)
VSSS
AI07926
10/66

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