LTC1604 データシートの表示（PDF） - Linear Technology

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LTC1604

High Speed, 16-Bit, 333ksps Sampling A/D Converter with Shutdown

Linear Technology 

LTC1604

APPLICATIONS INFORMATION

CS = 0

tCONV

t8

RD = CONVST

t6

t11

BUSY

DATA

t10

DATA (N – 1)

D5 TO D0

t7

DATA N

D15 TO D0

DATA N

D15 TO D0

Figure 8. Mode 2. Slow Memory Mode Timing

DATA (N + 1)

D15 TO D0

1604 F08

CS = 0

RD = CONVST

BUSY

DATA

tCONV

t8

t6

t11

t10

DATA (N – 1)

D15 TO D0

DATA N

D15 TO D0

Figure 9. ROM Mode Timing

1604 F09

three-state until read by the MPU with the RD signal. Mode

2 can be used for operation with a shared data bus.

In slow memory and ROM modes (Figures 8 and 9) CS is

tied low and CONVST and RD are tied together. The MPU

starts the conversion and reads the output with the com-

bined CONVST-RD signal. Conversions are started by the

MPU or DSP (no external sample clock is needed).

In slow memory mode the processor applies a logic low to

RD (= CONVST), starting the conversion. BUSY goes low,

forcing the processor into a wait state. The previous

conversion result appears on the data outputs. When the

conversion is complete, the new conversion results

appear on the data outputs; BUSY goes high, releasing the

processor and the processor takes RD (= CONVST) back

high and reads the new conversion data.

In ROM mode, the processor takes RD (= CONVST) low,

starting a conversion and reading the previous conversion

result. After the conversion is complete, the processor can

read the new result and initiate another conversion.

DIFFERENTIAL ANALOG INPUTS

Driving the Analog Inputs

The differential analog inputs of the LTC1604 are easy to

drive. The inputs may be driven differentially or as a single-

ended input (i.e., the AIN– input is grounded). The AIN+ and

AIN– inputs are sampled at the same instant. Any un-

wanted signal that is common mode to both inputs will be

reduced by the common mode rejection of the sample-

and-hold circuit. The inputs draw only one small current

spike while charging the sample-and-hold capacitors at

the end of conversion. During conversion the analog

inputs draw only a small leakage current. If the source

impedance of the driving circuit is low, then the LTC1604

inputs can be driven directly. As source impedance in-

creases so will acquisition time (see Figure 10). For

minimum acquisition time with high source impedance, a

buffer amplifier should be used. The only requirement is

that the amplifier driving the analog input(s) must settle

after the small current spike before the next conversion

11

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