HD74HC77FPEL データシートの表示（PDF） - Renesas Electronics

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HD74HC77FPEL

4-bit Bistable Latch

Renesas Electronics 

HD74HC77

Test Circuit

VCC

Input

Pulse generator

Zout = 50 Ω

Input

Pulse generator

Zout = 50 Ω

VCC

Enable Q

Data Q

Output

Output

CL = 50 pF

CL = 50 pF

Note: CL includes the probe and jig capacitance.

Waveforms

• Waveform − 1

tr

tw

tf

tw

90 %

90 %

D

50 %

50 %

VCC

50 %

10 %

10 %

0V

tsu

th

tsu

th

tr

tf

Latch

90 % 90 %

VCC

Enable

50 % 50 %

50 %

50 %

10 %

10 %

tw

tw

tPHL

0V

tPLH

tPHL

tPLH

90 %

90 %

Q

50 %

50 %

10 %

10 %

tTLH

tTHL

VOH

VOL

Note: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 6 ns, tf ≤ 6 ns

Rev.2.00, Oct 06, 2005 page 4 of 6

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