MACH435Q-20JC データシートの表示（PDF） - Lattice Semiconductor
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MACH435Q-20JC Datasheet PDF : 30 Pages
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SWITCHING CHARACTERISTICS over COMMERCIAL operating ranges (Note 1)
Parameter
Symbol
tPD
tSA
tHA
tCOA
tWLA
tWHA
fMAXA
tSS
tHS
tCOS
tWLS
tWHS
fMAXS
tSLA
tHLA
tGOA
tGWA
tSLS
tHLS
tGOS
tGWS
tPDL
tSIR
tHIR
tICO
Parameter Description
Input, I/O, or Feedback to Combinatorial Output
Setup Time from Input, I/O, or
Feedback to Product Term Clock
Register Data Hold Time Using Product Term Clock
Product Term Clock to Output
Product Term, Clock Width
External Feedback
Maximum Frequency
Using Product Term
Clock (Note 2)
Internal Feedback (fCNTA)
No Feedback (Note 3)
Setup Time from Input, I/O, or Feedback
to Global Clock
Register Data Hold Time Using Global Clock
Global Clock to Output
Global Clock Width
Maximum Frequency
Using Global
Clock (Note 2)
External Feedback
Internal Feedback (fCNTA)
No Feedback (Note 3)
Setup Time from Input, I/O, or Feedback to
Product Term Clock
Latch Data Hold Time Using Product Term Clock
Product Term Gate to Output
Product Term Gate Width LOW (for LOW transparent)
or HIGH (for HIGH transparent)
Setup Time from Input, I/O, or Feedback to Global Gate
Latch Data Hold Time Using Global Gate
Gate to Output
Global Gate Width LOW (for LOW transparent)
or HIGH (for HIGH transparent)
Input, I/O, or Feedback to Output Through
Transparent Input or Output Latch
Input Register Setup Time
Input Register Hold Time
Input Register Clock to Combinatorial Output
D-type
T-type
LOW
HIGH
D-type
T-type
D-type
T-type
D-type
T-type
LOW
HIGH
D-type
T-type
D-type
T-type
-12
Min Max
3
12
5
6
5
4
14
8
8
52.6
50
58.8
55.6
62.5
7
8
0
2
8
6
6
66.7
62.5
83.3
76.9
83.3
5
5
16
6
8
0
10
6
14
2
3
18
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
MHz
MHz
MHz
MHz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MACH435-12 (Com’l)
9
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