MACH130-18 データシートの表示（PDF） - Lattice Semiconductor

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MACH130-18

High-Density EE CMOS Programmable Logic

Lattice Semiconductor 

BLOCK DIAGRAM

I/O0 – I/OI5

16

I/O Cells

16

Macrocells

OE

52 x 70

AND Logic Array

and

Logic Allocator

26

26

52 x 70

AND Logic Array

and

Logic Allocator

OE

Macrocells

16

I/O Cells

16

I/O48 – I/O63

I/O16 – I/O31

I2, I5

16

I/O Cells

16

Macrocells

OE

52 x 70

AND Logic Array

and

Logic Allocator

26

Switch Matrix

26

52 x 70

AND Logic Array

and

Logic Allocator

OE

4

Macrocells

16

I/O Cells

16

4

2

4

I/O32 – I/O47

CLK0/I0, CLK1/I1

CLK2/I3, CLK3/I4

14131H-1

2

MACH130-15/20

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