MACH110-12 データシートの表示（PDF） - Advanced Micro Devices

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MACH110-12

High-Density EE CMOS Programmable Logic

Advanced Micro Devices 

FINAL

COM’L: -12/15/20

IND: -14/18/24

MACH110-12/15/20

High-Density EE CMOS Programmable Logic

Advanced

Micro

Devices

DISTINCTIVE CHARACTERISTICS

s 44 Pins

s 32 Macrocells

s 12 ns tPD Commercial

14 ns tPD Industrial

s 77 MHz fCNT

s 38 Inputs

GENERAL DESCRIPTION

The MACH110 is a member of AMD’s high-performance

EE CMOS MACH 1 family. This device has approxi-

mately three times the logic macrocell capability of the

popular PAL22V10 without loss of speed.

The MACH110 consists of two PAL blocks intercon-

nected by a programmable switch matrix. The two PAL

blocks are essentially “PAL22V16” structures complete

with product-term arrays and programmable macro-

cells. The switch matrix connects the PAL blocks to

each other and to all input pins, providing a high degree

of connectivity between the fully-connected PAL blocks.

This allows designs to be placed and routed efficiently.

s 32 Outputs

s 32 Flip-flops; 2 clock choices

s 2 “PAL22V16” Blocks

s Pin-compatible with MACH111, MACH210,

MACH211, MACH215

The MACH110 macrocell provides either registered or

combinatorial outputs with programmable polarity. If a

registered configuration is chosen, the register can be

configured as D-type or T-type to help reduce the

number of product terms. The register type decision can

be made by the designer or by the software. All

macrocells can be connected to an I/O cell. If a buried

macrocell is desired, the internal feedback path from the

macrocell can be used, which frees up the I/O pin for use

as an input.

Publication# 14127 Rev. I Amendment /0

Issue Date: May 1995

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