MACH110-12 データシートの表示（PDF） - Lattice Semiconductor

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MACH110-12

High-Density EE CMOS Programmable Logic

Lattice Semiconductor 

0

4

8

12

16

20

24

28

32

36

40 43

Output Enable

Output Enable

Asynchronous Reset

Asynchronous Preset

0

Switch

Matrix

63

0

4

8

12

16

20

24

28

32

36

40 43

16

16

M0

M1

M2

M3

C0

M4

C1

C2

C3

M5

C4

C5

M6

C6

C7

M7

C8

C9

M8

C10

C11 M9

C12

C13 M10

C14

C15 M11

M12

M13

M14

M15

4

Output Enable

Output Enable

Figure 1. MACH110 PAL Block

I/O

Output

Cell

I/O

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Output

Cell

I/O

Macro

Cell

I/O

Output

Cell

I/O

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

I/O

Cell

I/O

Output

Macro

Cell

14127I-3

MACH110-12/15/20

7

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