MAX746CSE データシートの表示（PDF） - Maxim Integrated

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MAX746CSE

High-Efficiency, PWM, Step-Down, N-Channel DC-DC Controller

Maxim Integrated 

High-Efficiency, PWM, Step-Down,

N-Channel DC-DC Controller

VIN

6V TO 15V

C3

0.1µF

C2

47µF

D4

1N5817

C9

4.7µF

D2

D3

R2

2 LBI

15

V+

1N914*

CP 14

C8 1N914*

0.1µF

R1

C5

0.1µF 3 SS

HIGH 13

AV+ 8

C6

1µF 4 REF MAX746 CS 10

Q1

RSENSE

75mΩ

6 FB

EXT 12

Si9410DY

N L1**

82µH

5 SHDN

CC 7

C7

D1

11 AGND

9

OUT

LB0 1

1nF

C4

0.1µF

NSQ03A03

R3

100k

GND

16

5V

AT 1.5A

C1

220µF

* SEE TABLE 2 FOR DIODE SELECTION.

** SUMIDA CDR125 SURFACE-MOUNT INDUCTOR.

Figure 1c. 5V Standard Application Circuit (7.5W)

The steady-state SS pin voltage is typically 3.8V. On

power-up, SS sources 1µA until its voltage reaches

3.8V. The current-limit comparator inhibits EXT switch-

ing until the SS voltage reaches 1.8V. The peak current

limit is set by:

IPK = __V_L_I_M_I_T__ = _1_5_0_m__V__(t_y_p_)

RSENSE

RSENSE

where VLIMIT is the differential voltage across the current-

sense amplifier inputs. Figure 4 shows how the SS peak

current limit increases as the voltage on SS rises for two

RSENSE values.

Undervoltage Lockout

Undervoltage lockout inhibits operation of EXT until the

charge pump is capable of generating a voltage greater

than 4.3V above the supply voltage (Figure 2). When

the undervoltage-lockout comparator detects an under-

voltage condition, the switching action at EXT is halted.

Shutdown Mode

When SHDN is high, the MAX746 is shut down. In this

mode, the internal biasing circuitry (including EXT) is

turned off, VOUT drops to 0V, and the supply current

drops to 1.4µA (20µA max). This excludes external

component leakage, which may add several

microamps to the shutdown supply current for the

entire circuit. SHDN is a logic input. Connect SHDN to

GND for normal operation.

Low-Battery Detector

The MAX746 provides a low-battery comparator that

compares the voltage on LBI to the reference voltage.

LBO, an open-drain output, goes low when the LBI volt-

age is below VREF. Use a resistor-divider network, as

shown in the Input Voltage Monitor Circuit (Figure 5),

to set the trip voltage (VTRIP) at the desired level. In

this circuit, LBO goes low when V+ ≤ VTRIP. LBO is high

impedance in shutdown mode.

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