ISL88705(2006) データシートの表示（PDF） - Intersil

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ISL88705
(Rev.:2006)

µP Supervisor with Watchdog Timer, Power-Fail Comparator, Manual Reset and Adjustable Power-On Reset

Intersil 

ISL88705, ISL88706, ISL88707, ISL88708, 8SL88716, ISL88813

+5V

R1

R2

VDD

MR

PFI

PFO

100k

RST

-5V

ISL8870X

100k

2N3904

FIGURE 15. ISL88075EVAL1

Bipolar Voltage Sensing

Any of the ISL88705 - ISL88813 devices can be used to

sense and report the presence of both a positive and

negative voltage via the PFI and PFO as shown in Figure 16.

The VDD monitors the positive voltage as normal and the

PFI monitors the presence of the negative supply. As the

differential voltage across the R1, R2 divider is increased the

resistor values must be chosen such that the PFI node is

<1.25V when the -V supply is satisfactory and the positive

supply is at its maximum specified value. This allows the

positive supply to fluctuate within its acceptable range

without signaling a reset. Driving the MR with the inverted

PFO signal as shown provides for reset generation when -V

is not satisfactorily present. Reset will remain asserted as

long as PFO is high.

RESET

V+

V-

FIGURE 16. ±5V MONITORING

Special Application Considerations

Using good decoupling practices will prevent transients

(i.e., due to switching noises and short duration droops in the

supply voltage) from causing unwanted resets.

When using the CPOR pin, avoid stray capacitance during

layout as much as possible in order to minimize its effect on

the tPOR timing.

11

FN8092.3

December 6, 2006

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