SRK2000DTR(2012) データシートの表示（PDF） - STMicroelectronics

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SRK2000DTR
(Rev.:2012)

Synchronous rectifier smart driver for LLC resonant converters

STMicroelectronics 

SRK2000

Application information

Figure 8. Typical connection of the SRK2000 to the SR MOSFET

To Xformer

ISR1

RD

SR1

RG

SRK2000

DVS1

GD1

5.3

Gate driving

The IC is provided with two high-current gate-drive outputs (1 A source and 3.5 A sink),

each capable of driving one or more N-channel Power MOSFETs. Thanks to the

programmable gate-drive UVLO, it is possible to drive both standard MOSFETs and logic

level MOSFETs.

The high-level voltage provided by the driver is clamped at VGDclamp (=12 V) to avoid

excessive voltage levels on the gate in case the device is supplied with a high Vcc.

The two gate drivers have a pull-down capability that ensures the SR MOSFETs cannot be

spuriously turned on even at low Vcc: in fact, the drivers have a 1 V (typ.) UVLO saturation

level at Vcc below the turn-on threshold.

5.4

Intelligent automatic sleep-mode

A unique feature of this IC is its intelligent automatic sleep-mode. The logic circuitry is able

to detect a light load condition for the converter and stop gate driving, also reducing the IC’s

quiescent consumption. This improves converter efficiency at light load, where the power

losses on the rectification body diodes (or external diodes in parallel to the MOSFETs) go

lower than the power losses in the MOSFETs and those related to their driving.

The IC is also able to detect an increase of the converter’s load and automatically restart

gate driving.

The algorithm used by the intelligent automatic sleep-mode is based on a dual time

measurement system. The duration of a switching cycle of an SR MOSFET (that is one half

of the resonant converter switching period) is measured using a combination of the

negative-going edge of the drain-to-source voltage falling below VDVS1,2_PT and the

positive-going edge exceeding VDVS1,2_A; the duration of the SR MOSFET conduction is

measured from the moment its body diode starts conducting (drain-to-source voltage falling

below VTH-ON) to the moment the gate drive is turned off (in case the device is operating) or

the moment the body diode ceases to conduct (drain-to-source voltage going over VTH-ON).

While at full load the SR MOSFET conduction time occupies almost 100% of the switching

cycle, as the load is reduced, the conduction time is reduced and as it falls below 40%

(DOFF) of the SR MOSFET switching cycle the device enters sleep-mode. To prevent

Doc ID 17811 Rev 2

13/17

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