UCN5910LW-2 データシートの表示（PDF） - Allegro MicroSystems
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UCN5910LW-2 Datasheet PDF : 8 Pages
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5910
HIGH-VOLTAGE BiMOS III
10-BIT SERIAL-INPUT,
LATCHED DRIVERS
CLOCK
SERIAL
DATA IN
STROBE
BLANKING
GROUND
FUNCTIONAL BLOCK DIAGRAM
V DD
SERIAL-PARALLEL SHIFT REGISTER
LATCHES
LOGIC
SUPPLY
SERIAL
DATA OUT
OUT 1 OUT 2 OUT 3
MOS
BIPOLAR
VBB
LOAD
SUPPLY
OUT N
Dwg. FP-013-1
TYPICAL INPUT CIRCUIT
VDD
IN
2.5
2.0
SUFFIX 'A', R
1.5
SUFFIX 'LW', R θJA = 55°C/W
1.0
θJA = 70°C/W
0.5
0
25
50
75
100
125
150
AMBIENT TEMPERATURE IN °C
Dwg. GS-004A
Dwg. EP-010-4A
TYPICAL OUTPUT DRIVER
V BB
OUT N
Dwg. No. A-14,219
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
Copyright © 1984, 1999, Allegro MicroSystems, Inc.
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