ISPLSI5384VE-80LF256 データシートの表示（PDF） - Lattice Semiconductor
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ISPLSI5384VE-80LF256 Datasheet PDF : 22 Pages
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Specifications ispLSI 5384VE
External Switching Characteristics
Over Recommended Operating Conditions
PARAM.
tpd16
tpd26
fmax
fmax (Ext.)
fmax (Tog.)
tsu1
tco16
th1
tsu2
th2
tsu3
th3
tr1
trw17
tpten/dis6
tgpten/dis6
TEST3
COND.
DESCRIPTION 4,5
A Data Prop. Delay, 5PT Bypass
A Data Propagation Delay
A Clock Frequency with Internal Feedback1
— Clock Freq. with Ext. Feedback,1/(tsu2 + tco1)
— Clock Frequency, Max Toggle2
— GLB Reg. Setup Time before Clk, 5PT bypass
A GLB Reg. Clock to Output Delay
— GLB Reg. Hold Time after Clock, 5PT bypass
— GLB Reg. Setup Time before Clock
— GLB Reg. Hold Time after Clock
— GLB Reg. Setup Time before Clock, Input Reg. Path
— GLB Reg. Hold Time after Clock, Input Reg. Path
A Ext. Reset Pin to Output Delay
— Ext. Reset Pulse Duration
B/C Local Product Term Output Enable/Disable
B/C Global Product Term Output Enable/Disable
-165
-125
UNITS
MIN. MAX. MIN. MAX.
— 6.0 — 7.5 ns
— 7.5 — 9.5 ns
165 — 125 — MHz
118 — 87 — MHz
200 — 167 — MHz
4.0 — 5.0 — ns
— 3.0 — 4.5 ns
0.0 — 0.0 — ns
5.5 — 7.0 — ns
0.0 — 0.0 — ns
3.0 — 3.5 — ns
0.5 — 0.5 — ns
— 8.0 — 10.0 ns
4.0 — 5.0 — ns
— 7.0 — 8.5 ns
— 12.0 — 14.0 ns
tgen/dis6
B/C Global OE Input to Output Enable/Disable
— 4.5 — 5.5 ns
tten/dis6
B/C Test OE Input to Output Enable/Disable
— 8.5 — 10.5 ns
twh
— Ext. Sync. Clock Pulse Duration, High
2.5 — 3.0 — ns
twl
— Ext. Sync. Clock Pulse Duration, Low
2.5 — 3.0 — ns
1. Standard 16-bit counter using GRP feedback.
5384ve1.eps Timing v.2.0
2. fmax (Toggle) may be less than 1/(twh + twl). This is to allow for a clock duty cycle of other than 50%.
3. Reference Switching Test Conditions section.
4. Unless noted otherwise, all timing numbers are taken with worst case PTSA fanout, a GRP load of 1 GLB, CLK0, and high-
speed AND array.
5. Timing parameters measured using normal active output driver.
6. The delay parameters are measured with Vcc as I/O voltage reference. An additional 0.5ns delay is incurred when Vccio is
used as I/O voltage reference.
7. Pulse widths less than minimum may cause unknown output behavior.
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