ISPLSI5384VE データシートの表示（PDF） - Lattice Semiconductor

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ISPLSI5384VE

In-System Programmable 3.3V SuperWIDE™ High Density PLD

Lattice Semiconductor 

Specifications ispLSI 5384VE

Functional Block Diagram

Figure 1. ispLSI 5384VE Functional Block Diagram (192-I/O Option)

VCCIO

1TOE

I/O 1

I/O 2

I/O 3

I/O 12

I/O 13

I/O 14

I/O 15

I/O 16

I/O 17

I/O 18

I/O 19

I/O 28

I/O 29

I/O 30

I/O 31

I/O 32

I/O 33

I/O 34

I/O 35

I/O 44

I/O 45

I/O 46

I/O 47

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Global Routing Pool

(GRP)

RESET

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

Generic

Logic Block

Input Bus

1. CLK2, CLK3 and TOE signals are multiplexed with I/O signals. Use the table below

to determine which I/O is shared by package type.

Package Type

256 fpBGA

272 BGA

Multplexed Signals

I/O 119 / CLK2 I/O 131 / CLK3 I/O 0 / TOE

I/O 119 / CLK2 I/O 131 / CLK3 I/O 0 / TOE

Boundary

Scan

Interface

TDI

TDO

I/O 143

I/O 142

I/O 141

I/O 140

I/O 131

I/O 130

I/O 129

I/O 128

I/O 127

I/O 126

I/O 125

I/O 124

I/O 115

I/O 114

I/O 113

I/O 112

I/O 111

I/O 110

I/O 109

I/O 108

I/O 99

I/O 98

I/O 97

I/O 96

2

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