M29F800AB データシートの表示（PDF） - STMicroelectronics
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M29F800AB Datasheet PDF : 22 Pages
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M29F800AT, M29F800AB
Figure 2. TSOP Connections
A15 1
48 A16
A14
BYTE
A13
VSS
A12
DQ15A–1
A11
DQ7
A10
DQ14
A9
DQ6
A8
DQ13
NC
DQ5
NC
DQ12
W
DQ4
RP 12 M29F800AT 37 VCC
NC 13 M29F800AB 36 DQ11
NC
DQ3
RB
DQ10
A18
DQ2
A17
DQ9
A7
DQ1
A6
DQ8
A5
DQ0
A4
G
A3
VSS
A2
E
A1 24
25 A0
AI02199
Table 1. Signal Names
A0-A18
Address Inputs
DQ0-DQ7 Data Inputs/Outputs
DQ8-DQ14 Data Inputs/Outputs
DQ15A–1 Data Input/Output or Address Input
E
Chip Enable
G
Output Enable
W
Write Enable
RP
Reset/Block Temporary Unprotect
RB
Ready/Busy Output
BYTE
Byte/Word Organization Select
VCC
Supply Voltage
VSS
Ground
NC
Not Connected Internally
2/22
Figure 3. SO Connections
RB
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
E
VSS
G
DQ0
DQ8
DQ1
DQ9
DQ2
DQ10
DQ3
DQ11
1
44
2
43
3
42
4
41
5
40
6
39
7
38
8
37
9
36
10
35
11 M29F800AT 34
12 M29F800AB 33
13
32
14
31
15
30
16
29
17
28
18
27
19
26
20
25
21
24
22
23
AI02101B
RP
W
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
DQ15A–1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
SUMMARY DESCRIPTION
The M29F800A is an 8 Mbit (1Mb x8 or 512Kb
x16) non-volatile memory that can be read, erased
and reprogrammed. These operations can be per-
formed using a single 5V supply. On power-up the
memory defaults to its Read mode where it can be
read in the same way as a ROM or EPROM.
The memory is divided into blocks that can be
erased independently so it is possible to preserve
valid data while old data is erased. Each block can
be protected independently to prevent accidental
Program or Erase commands from modifying the
memory. Program and Erase commands are writ-
ten to the Command Interface of the memory. An
on-chip Program/Erase Controller simplifies the
process of programming or erasing the memory by
taking care of all of the special operations that are
required to update the memory contents. The end
of a program or erase operation can be detected
and any error conditions identified. The command
set required to control the memory is consistent
with JEDEC standards.
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