UAA2077AM データシートの表示（PDF） - Philips Electronics

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UAA2077AM

Image rejecting front-end for DECT applications

Philips Electronics 

Philips Semiconductors

Image rejecting front-end

for DECT applications

Product specification

UAA2077AM

PINNING

SYMBOL

n.c.

n.c.

VCCLNA

n.c.

RFINA

RFINB

n.c.

LNAGND

SXON

VQUADLO

SBS

RXON

LOINB

LOINA

VCCLO

LOGND

IFA

IFB

n.c.

n.c.

PIN

DESCRIPTION

1 not connected

2 not connected

3 supply voltage for LNA and IF parts

4 not connected

5 RF input A (balanced)

6 RF input B (balanced)

7 not connected

8 ground for LNA and IF parts

9 SX mode enable (see Table 1)

10 input voltage for LO quadrature

trimming

11 sideband selection

12 RX mode enable (see Table 1)

13 LO input B (balanced)

14 LO input A (balanced)

15 supply voltage for LO parts

16 ground for LO parts

17 IF output A (balanced)

18 IF output B (balanced)

19 not connected

20 not connected

handbook, halfpage

n.c. 1

20 n.c.

n.c. 2

VCCLNA 3

19 n.c.

18 IFB

n.c. 4

17 IFA

RFINA 5

16 LOGND

UAA2077AM

RFINB 6

15 VCCLO

n.c. 7

14 LOINA

LNAGND 8

13 LOINB

SXON 9

VQUADLO 10

12 RXON

11 SBS

MBH151

Fig.2 Pin configuration.

FUNCTIONAL DESCRIPTION

Receive section

The circuit contains a low-noise amplifier followed by two

high dynamic range mixers. These mixers are of the

Gilbert-cell type, the whole internal architecture is fully

differential.

The local oscillator, shifted in phase to 45° and 135°,

mixes the amplified RF to create I and Q channels.

The two I and Q channels are buffered, phase shifted by

45° and 135° respectively, amplified and recombined

internally to realize the image rejection.

Pin SBS allows sideband selection:

• fLO > fRF (SBS = 1)

• fLO < fRF (SBS = 0).

where fRF is the frequency of the wanted signal.

Balanced signal interfaces are used for minimizing

crosstalk due to package parasitics.

The IF output is differential and of the open-collector type.

Typical application will load the output with a differential

1 kΩ load; for example, a 1 kΩ resistor load at each IF

output, plus a differential 2 kΩ load consisting of the input

impedance of the IF filter or the input impedance of the

matching network for the IF filter. The power gain refers to

the available power on this 2 kΩ load. The path to VCC for

the DC current should be achieved via tuning inductors.

The output voltage is limited to VCC + 3Vbe or 3 diode

forward voltage drops.

Fast switching, on/off, of the receive section is controlled

by the hardware input RXON.

1996 Jul 04

4

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