UPD70433GJ-16-3EB データシートの表示（PDF） - NEC => Renesas Technology

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UPD70433GJ-16-3EB

V55PI™ 16-BIT MICROPROCESSOR

NEC => Renesas Technology 

µPD70433

3.2.3 Pointers (SP, BP) and Index Registers (IX, IY)

These are 16-bit registers used as base pointers or index registers in memory accesses using based addressing (BP),

indexed addressing (IX, IY), based indexed addressing (BP, IX, IY), etc. The SP is also used as the pointer in stack

operations. As with general registers, these are used with transfer instructions, arithmetic operation instructions, etc., but

in this case they cannot be used as 8-bit registers. Each register is also used as the fixed address pointer for specific

instruction processing, as shown below.

SP : Stack manipulation

IX : Block transfers, BCD operation source side address specification

IY : Block transfers, BCD operation destination side address specification

These registers are mapped onto the register file space (in on-chip RAM). The address is the value obtained by adding

the offset for each register to (register bank number × 32).

Table 3-2. Pointer and Index Register Offsets

Register

SP

BP

IX

IY

Offset

16H

14H

12H

10H

3.2.4 Segment Registers (PS, SS, DS0, DS1)

The CPU manages the 1M-byte basic memory space by dividing it into 64K-byte units. The CPU specifies the start

address of each segment with a segment register, and uses another register or effective address for the specification of

phyiscal address, with the relative address from the start address as the offset.

The physical address is created as shown below.

Segment Register 4-Bit Fixed

x x x x 0 H .... Segment Start Address

+ 0 x x x x H .... Offset Value

x x x x x H ..... Physical Address (20 Bits)

There are four segment registers: PS (Program Segment), SS (Stack Segment), DS0 (Data Segment 0), and DS1 (Data

Segment 1). The respective segments are used in the following cases.

PS : Program fetch

SS : Stack manipulation instructions, addressing using BP as base register

DS0 : General variable accesses, source block data accesses such as block transfer instructions, etc.

DS1 : Destination block data accesses such as block transfer instructions, etc.

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