PI6C671F データシートの表示（PDF） - Pericom Semiconductor Corporation

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PI6C671F

Clock Generator for Pentium Modules

Pericom Semiconductor Corporation 

PI6C671F

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Byte 1: CPU 24/48 MHz Active/Inactive Register

(1 = enable, 0 = disable)

Bit Pin No.

7 23

6 22

5

4 N/A

3 38

2 39

@ Powerup

Description

1

48/24 MHz (Active/Inactive)

1

48/24 MHz (Active/Inactive)

X

(Reserved)

X

CPUCLK4 (Active/Inactive)

1

CPUCLK3 (Active/Inactive)

1

CPUCLK2 (Active/Inactive)

1 41

1

CPUCLK1 (Active/Inactive)

0 42

1

CPUCLK0 (Active/Inactive)

Byte 2: PCI Active/Inactive Register

(1 = enable, 0 = disable)

Bit Pin No. @ Powerup

Description

7

6

8

5 16

4 14

3 13

2 12

X

(Reserved)

1

PCICLK_F (Active/Inactive)

1

PCICLK5 (Active/Inactive)

1

PCICLK4 (Active/Inactive)

1

PCICLK3 (Active/Inactive)

1

PCICLK2 (Active/Inactive)

1 11

1

PCICLK1 (Active/Inactive)

0

9

1

PCICLK0 (Active/Inactive)

Byte 4: SDRAMActive/Inactive Register

(1 = enable, 0 = disable)

1

Bit Pin No.

Description

7

N/A

SDRAM15 (Active/Inactive)

2

6

N/A

SDRAM14 (Active/Inactive)

5

N/A

SDRAM13 (Active/Inactive)

4

N/A

SDRAM12 (Active/Inactive)

3

3

N/A

SDRAM11 (Active/Inactive)

2

N/A

SDRAM10 (Active/Inactive)

1

N/A

SDRAM9 (Active/Inactive)

4

0

N/A

SDRAM8 (Active/Inactive)

5

Byte 5: Peripheral Active/Inactive Register

(1 = enable, 0 = disable)

Bit Pin No. @ Powerup

Description

6

7

X

(Reserved)

6

X

(Reserved)

5

4

45

3

2

47

1

1

1

(Reserved)

7

1

IOAPIC (Active/Inactive)

X

(Reserved)

8

1

REF2 (Active/Inactive)

1

REF1 (Active/Inactive)

9

0

2

1

REF0 (Active/Inactive)

10

Byte3: SDRAM Active/Inactive Register

(1 = enable, 0 = disable)

Byte 6: Optional Register

for Possible Future Requirements

11

Bit Pin No. @ Powerup

Description

Bit Pin Number

Description

7 26

1

SDRAM7 (Active/Inactive)

7

X

(Reserved)

12

6 27

1

SDRAM6 (Active/Inactive)

6

X

(Reserved)

13

5 29

1

SDRAM5 (Active/Inactive)

5

X

(Reserved)

4 30

1

SDRAM4 (Active/Inactive)

4

X

(Reserved)

14

3 32

1

SDRAM3 (Active/Inactive)

3

X

(Reserved)

2 33

1

SDRAM2 (Active/Inactive)

2

X

(Reserved)

15

1 35

1

SDRAM1 (Active/Inactive)

1

X

(Reserved)

0 36

1

SDRAM0 (Active/Inactive)

0

X

(Reserved)

395

PS8137A 03/15/99

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