CS4630-CM データシートの表示（PDF） - Cirrus Logic

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CS4630-CM

CrystalClear™ SoundFusion® PCI Audio Accelerator

Cirrus Logic 

CS4630

AC ’97 SERIAL INTERFACE TIMING (TA = 0 to 70° C; PCIVDD = CRYVDD = 3.3 V; CVDD = 2.5

V;VDD5REF = 5 V; PCIGND = CGND = CRYGND = 0 V; Logic 0 = 0 V, Logic 1 = 3.3 V;

Timing reference levels = 1.4 V; unless otherwise noted)

Parameter

ABITCLK/ABITCLK2 cycle time

ABITCLK/ABITCLK2 rising to ASDOUT/ADSOUT2 valid

ASDIN/ASDIN2 valid to ABITCLK/ABITCLK2 falling

ASDIN/ASDIN2 hold after ABITCLK/ABITCLK2 falling

PCICLK rising to ARST#/ARST2# valid

Symbol Min

taclk

78

tpd5

-

ts5

10

th5

5

tpd6

-

Typ Max

81.4

-

17

25

-

-

-

-

10

-

Unit

ns

ns

ns

ns

ns

ABITCLK/ABITCLK2

ASYNC/ASYNC2

ASDOUT/ASDOUT2

ASDIN/ASDIN2

ARST#/ARST2#

PCICLK

t aclk

t pd5

t s5

t h5

t pd6

Figure 3. AC ’97 Configuration Timing Diagram

8

DS445PP1

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