UPG181GR-E1 データシートの表示（PDF） - California Eastern Laboratories.
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UPG181GR-E1 Datasheet PDF : 3 Pages
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EVALUATION CIRCUIT (VCONT1 to VCONT4 = 0/+5 V, ZO = 50 Ω, DC Blocking Capacitor = 1000 pF)
VCONT1 VCONT2
C = 1000 pF
IN1
(L)
ZO = 50Ω
16
C = 1000 pF
ZO = 50Ω
9
OUT 1
UPG181GR
1
IN2
ZO = 50 Ω
(R)
C = 1000 pF
8
ZO = 50Ω
C = 1000 pF
OUT 2
VCONT3 VCONT4
CHANNEL SELECT TRUTH TABLE
OUTPUT
OUT1
L
OUT2
L
L
R
R
L
R
R
On-Channel
IN1—OUT1
IN1—OUT2
IN1—OUT1
IN2—OUT2
IN2—OUT1
IN1—OUT2
IN2—OUT1
IN2—OUT2
VCONT1
Low
Low
High
High
CONTROL PIN
VCONT2
High
VCONT3
High
High
Low
Low
High
Low
Low
VCONT4
Low
High
Low
High
PIN CONNECTION AND INTERNAL
BLOCK DIAGRAM
PIN NO. CONNECTION PIN NO. CONNECTION
1
IN2
9
OUT1
2
GND
10
GND
3
GND
11
GND
4
VCONT3
12
VCONT2
5
VCONT4
13
VCONT1
6
GND
14
GND
7
GND
15
GND
8
OUT2
16
IN1
TOP VIEW
16 15 14 13 12 11 10 9
1 23 45 6 7 8
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DATA SUBJECT TO CHANGE WITHOUT NOTICE
01/20/2000
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