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MU9C8338A データシートの表示(PDF) - MUSIC Semiconductors

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MU9C8338A
MUSIC
MUSIC Semiconductors MUSIC
MU9C8338A Datasheet PDF : 32 Pages
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Functional Description
MU9C8338A 10/100Mb Ethernet Filter Interface
1. The CPU issues an increment STPURG command.
Only the STPURG counter is increased.
2. The CPU issues an increment STCURR and STPURG
command. Both counters are increased simultaneously.
3. The INCR pin is asserted. Both counters are increased
simultaneously.
If the STPURG value was incremented, the MU9C8338A
initiates a purge operation using the new STPURG value.
STPURG should never be incremented to equal STCURR.
The time stamping of LANCAM entries and the procedure
required to initiate a purge is explained as follows:
1. Incoming SAs to be learned are associated with the
most recent STCURR value. The time stamps of each
SA already in the CAM database is updated to
STCURR, each time a packet with that SA is processed.
2. STPURG and STCURR are advanced as described
earlier to purge entries that have the same time stamp
value as STCURR.
Following is an example, beginning with the defaults,
initially, STCURR = 00H and STPURG = 01H. As
packets arrive, learned or refreshed, SAs are labeled with
STCURR = 00H. (At that moment STPURG = 01H).
Increment, either hardware or software initiated, results in
STCURR = 01H and STPURG=02H.
A purge operation is initiated that will eliminate all CAM
entries with time stamp = 02H. The oldest entries (SAs)
that have not been updated in 255 increment times are
purged automatically without further involvement.
If the CAM Full flag is asserted, an interrupt (if
configured) to the CPU is generated. Assume that
STCURR = F0H, and STPURG = F1H. The CPU may
initiate an increment STPURG operation so that older
entries may be purged. This increases the value of
STPURG to F2H. A purge operation is initiated that will
eliminate all CAM entries with time stamp = F2H.
The CPU should monitor the System Status register, and if
the CAM is still full, the operation can be repeated until
entries are purged and the CAM Full flag is de-asserted.
Assume that STPURG was incremented 128 times. This
would purge the oldest half of the time stamp values and
thus, reduce the maximum age to half the previous 255.
This can be accomplished without disturbing ongoing
normal increment time stamp update operations.
CRC and Other Data Integrity Checks
For 10Base-X packets, a 32-bit cyclic redundancy check is
calculated from the data frame (exclusive of the preamble
and start frame delimiter) and compared to the frame
check sequence (FCS). This check is only performed if the
PCFG register is set accordingly to enable the facility.
Also, according to the MII interface specifications, the
RX_ER, CRS, and COL signals are monitored and error
conditions are recognized. If any error is identified, the
source address is not processed. This is intended to
maintain the integrity of the LANCAM database.
Rev. 0a
11

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