NTE3880 データシートの表示（PDF） - NTE Electronics

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NTE3880

Integrated Circuit NMOS, 8–Bit Microprocessor (MPU), 4MHz

NTE Electronics 

AC Characteristics (Cont’d): (TA = 0°C to +70°C, VCC = +15V ± 5% unless otherwise specified)

Parameter

Symbol Signal Test Conditions Min Typ Max Unit

M1 Delay From Rising Edge of Clock,

M1 Low

M1 Delay From Rising Edge of Clock,

M1 High

tDL (M1)

tDH (M1)

M1 CL = 50pF

–

– 100 ns

–

– 100 ns

RFSH Delay From Rising Edge of Clock,

RFSH Low

tDL (RF) RFSH CL = 50pF

–

– 130 ns

RFSH Delay From Rising Edge of Clock,

RFSH High

tDH (RF)

–

– 120 ns

WAIT Setup Time to Falling Edge of Clock

HALT Delay Time From Falling Edge of Clock

INT Setup Time to Rising Edge of Clock

Pulse Width, NM1 Low

BUSRQ Setup Time to Rising Edge of Clock

BUSAK Delay From Rising Edge of Clock,

BUSAK Low

ts (WT)

tD (HT)

ts (IT)

tw (NML)

ts (BQ)

tDL (BA)

WAIT

HALT CL = 50pF

INT

NM1

BUSRQ

BUSAK CL = 50pF

70

–

– ns

–

– 300 ns

80

–

– ns

80

–

– ns

50

–

– ns

–

– 100 ns

BUSAK Delay From Rising Edge of Clock, tDH (BA)

BUSAK High

–

– 100 ns

RESET Setup Time to Rising Edge of Clock

Delay to Float (MREQ, IORQ, RD and WR)

M1 Stable Prior to IORQ (Interrupt Ack.)

ts (RS)

tF (C)

tmr

RESET

60

–

–

–

Note 14 –

– ns

80 ns

– ns

Note14. tmr = 2tc + tw (φH) + tf–65.

Note15. Data should be enabled onto the CPU data bus when RD is active. During interrupt acknowledge

data should be enabled when M1 and IORQ are both active.

Note16. All control signals are internally synchronized, so they may be totally asynchronous with

respect to the clock.

Note17. The RESET signal must be active for a minimum of 3 clock cycles.

Note18. Output Delay vs. Loaded Capacitance

TA = +70°C

VCC = 5V ±5%

Add 10ns delay for each 50pf increase in load up to maximum of 200pF for data bus and

100pF for address & control lines.

Pin Connection Diagram

A11 1

A12 2

A13 3

A14 4

A15 5

System Clock Input 6

D4 7

D3 8

D5 9

D6 10

(+) 5V 11

D2 12

D7 13

D0 14

D1 15

INT 16

NMI 17

40 A10

39 A9

38 A8

37 A7

36 A6

35 A5

34 A4

33 A3

32 A2

31 A1

30 A0

29 GND

28 RFSH

27 M1

26 RESET

25 BUSRQ

24 WAIT

HALT 18

MREQ 19

IORQ 20

23 BUSAK

22 WD

21 RD

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