NTE874 データシートの表示（PDF） - NTE Electronics

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NTE874

Integrated Circuit TV Horiz/Vert Countdown System Circuit

NTE Electronics 

Electrical Characteristics (Cont’d): (TA = +25°C, VCC = 12VDC, V25 = 12VDC, Pin 2, 15, 22 to

GND;, 1µF from Pin 4 to GND., 10K ohms from Pin 28 to GND., FCLK = 1MHz, (AC Coupled),

VSync 1.2V to 4V, VIV 1.9V to 2.8V, VFA 0.2V to 0.7V)

Parameter

Test Conditions

PIN # Min Typ Max Units

Vertical Drive Section (Cont’d)

Non–Standard Vertical

Pulse Width

Sync 9 Serrations Within 384

11

362 364 367 –

Clock Window, Number of

Clock Cycles Output is On

Non–Standard Mode Asynch- No IV or Sync Applied (After 7 11, 16 –

ronous Divide Ratio

Fields, i.e., on 8th Field)

– 21888 –

Blanking Pulse Width

–

16 1200 1216 1220 –

Noise Mode Change

IV Outside the Range of

11,16

–

– 16800 –

(16784–16832) Sync = 9

Serrations in 384 Clock Win-

dow Pulse Applied 2432 to

11520 After an IV, Pulse is 8

to 32 Clocks Wide. Resync

results in next field and is

maintained for Mode Change

Confidence Count

Force Non–Standard Mode IV = 16800 Sync = 9 Serra-

11

362 364 367 µs

tions Within 384 Clock Win-

dow. VFA Open Circuit Verti-

cal Pulse Width M Measured

in Next Field.

Note 1 All timing measurements are with reference to the leading edge of the fly–back pulse input

to Pin 18. Fly–back pulse width is 12.00 µs and it is from 0 to 5V. Fly–back pulse train should

start about 500 µs after the start of vertical drive pulse.

Note 2 Start of fly–back pulse is 90 degrees leading with clock.

Note 3 Start of fly–back pulse is 90 degrees lagging with clock.

Note 4 Threshold for measuring AGC gate and horizontal blanking is 3V and burst gate is at 9V.

Note 5. Timing measurements referenced to trailing edge of negative sync pulse input to Pin 26. The

negative sync pulse width is is 4.5µs and is from 0 to 500µA, with negative leading edge

delayed 0.5µs from the positive leading edge of the fly–back pulse. The input to Pin 27 is

+4VDC.

Note 6 IV Ratio same as in Non–Standard Mode Ratio Range Test.

Note 7 IV Ratio same as in Standard Mode Ratio Test.

Note 8 Burst Gate Start is with reference to trailing edge of sync pulse at Pin 26. Sync Pulse is a

500µA Sink Current at Pin 26.

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