CXD3172AR データシートの表示（PDF） - Sony Semiconductor

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CXD3172AR

Signal Processor LSI for Single CCD Color Camera

Sony Semiconductor 

CXD3172AR

Relationship between MODESEL and Each Clock

TV

system

CCD

type

MODESEL

ECK

MCK

DSPCK∗1

Remarks

0 38.13986MHz (ECK = MCK)

ECK and MCK are connected internally.

510H

NTSC

1 28.63636MHz

MCK/4

38.13986MHz

2 27.00000MHz

760H

6 28.63636MHz (ECK = MCK)

ECK and MCK are connected internally.

MCK/2

8 27.00000MHz 28.63636MHz

3 37.87500MHz (ECK = MCK)

ECK and MCK are connected internally.

510H

PAL

4 35.46895MHz

MCK/4

37.87500MHz

5 27.00000MHz

9 28.37500MHz (ECK = MCK)

ECK and MCK are connected internally.

760H

A 35.46895MHz

MCK/2

28.37500MHz

B 27.00000MHz

∗1 DSPCK: clock which is not output by external pins

See the above table for the relationship between encoder clock (ECK) and system drive clock (MCK).

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