MAX6876 データシートの表示（PDF） - Maxim Integrated

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MAX6876

EEPROM-Programmable, Quad, Power-Supply Tracker/Sequencer Circuit

Maxim Integrated 

EEPROM-Programmable, Quad,

Power-Supply Tracker/Sequencer Circuit

ELECTRICAL CHARACTERISTICS (continued)

(VCC, IN1–IN4 = +2.7V to +5.5V; ENABLE = MARGIN = MR = ABP = TRKEN; TA = -40°C to +85°C, unless otherwise specified.

Typical values are at TA = +25°C.) (Note 1)

PARAMETER

SYMBOL

CONDITIONS

TRKEN Input Delay

tEN

TRKEN falling, 100mV overdrive

TRKEN Reference Voltage Range

VTRKEN

Input rising

Input falling

TRKEN Input Current

Reference Input Voltage Range

ITRKEN

VREFIN

VTRKEN = 1.25V

Reference Input Resistance

RREFIN VREFIN = 1.25V

SERIAL INTERFACE LOGIC (SDA, SCL, A0, A1)

Logic-Input Low Voltage

VIL

Logic-Input High Voltage

VIH

Input Leakage Current

Output-Voltage Low

IILKG

VOL

Output Leakage Current

IOLKG

Input/Output Capacitance

CI/O

SERIAL INTERFACE TIMING (SDA, SCL)

Serial Clock Frequency

Clock Low Period

fSCL

tLOW

Clock High Period

Bus Free Time

tHIGH

tBUF

START Setup Time

START Hold Time

tSU:STA

tHD:STA

STOP Setup Time

Clock Low to Valid Output

tSU:STO

tAA

Data Out Hold Time

tDH

Data In Setup Time

Data In Hold Time

tSU:DAT

tHD:DAT

SCL/SDA Rise Time

tR

SCL/SDA Fall Time

tF

ISINK = 3mA

Transmit SDA Fall Time

tF

CBUS = 400pF

SCL/SDA Noise Suppression Time

tI

Byte Write Cycle Time

tWR

MIN

1.245

1.225

-100

1.225

TYP

2

1.285

1.25

1.25

500

MAX

1.320

1.275

+100

1.275

UNITS

µs

V

nA

V

kΩ

0.3 x

V

ABP

0.6 x

ABP

V

1

µA

0.4

V

1

µA

10

pF

400 kHz

1.3

µs

0.6

µs

1.3

µs

0.6

µs

0.6

µs

0.6

µs

0.1

0.9

µs

50

ns

100

ns

0

ns

300

ns

300

ns

20 +

0.1 x

CBUS

300

ns

50

ns

11

ms

Note 1: Specifications guaranteed for the stated global conditions. 100% production tested at TA = +25°C and TA = +85°C.

Specifications at TA = -40°C are guaranteed by design.

Note 2: The internal supply voltage, measurable on ABP, is equal to the maximum of IN1–IN4 and VCC supplies.

Note 3: Differential between each of the OUT_ and the SYNCH ramp voltage during power-up/down measured as VOUT_ - 2 x

VSYNCH.

Note 4: FAULT timeout starts to count at the beginning of each sequence of power-up/down and clears when the programmed

OUT_ voltages track successfully.

_______________________________________________________________________________________ 5

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