MAX2121 データシートの表示（PDF） - Maxim Integrated
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MAX2121 Datasheet PDF : 18 Pages
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Complete Direct-Conversion L-Band Tuner
Table 2. N-Divider MSB Register (Address: 0x00)
BIT NAME
FRAC
N[14:8]
BIT LOCATION (0 = LSB)
7
6–0
DEFAULT
FUNCTION
1
Users must program to 1 upon powering up the device.
0000000
Sets the most significant bits of the PLL integer-divide number (N). N can
range from 19 to 251.
Table 3. N-Divider LSB Register (Address: 0x01)
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
FUNCTION
N[7:0]
7–0
00100011
Sets the least significant bits of the PLL integer-divide number. N can range
from 19 to 251.
Table 4. Charge-Pump Register (Address: 0x02)
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
FUNCTION
CPMP[1:0]
7–6
00
Charge-pump minimum pulse width. Users must program to 00 upon
powering up the device.
CPLIN[1:0]
5–4
00
Controls charge-pump linearity. Users must program to 01 upon powering
up the device.
F[19:16]
3–0
0010
Sets the 4 most significant bits of the PLL fractional divide number.
Default value is F = 194,180 decimal.
Table 5. F-Divider MSB Register (Address: 0x03)
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
FUNCTION
F[15:8]
7–0
11110110
Sets the most significant bits of the PLL fractional-divide number (F).
Default value is F = 194,180 decimal.
Table 6. F-Divider LSB Register (Address: 0x04)
BIT NAME BIT LOCATION (0 = LSB) DEFAULT
FUNCTION
F[7:0]
7–0
10000100
Sets the least significant bits of the PLL fractional-divide number (F).
Default value is F = 194,180 decimal.
Table 7. XTAL Buffer and Reference Divider Register (Address: 0x05)
BIT NAME
XD[2:0]
R[4:0]
BIT LOCATION (0 = LSB)
7–5
4–0
DEFAULT
000
00001
FUNCTION
Sets the crystal-divider setting.
000 = Divide by 1.
001 = Divide by 2.
011 = Divide by 3.
100 = Divide by 4.
101 through 110 = All divide values from 5 (101) to 7 (110).
111 = Divide by 8.
Sets the PLL reference-divider (R) number. Users must program to 00001
upon powering up the device.
00001 = Divide by 1; other values are not tested.
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