AM29F100T-75EI データシートの表示（PDF） - Advanced Micro Devices
部品番号
コンポーネント説明
メーカー
AM29F100T-75EI
Advanced Micro Devices
AM29F100T-75EI Datasheet PDF : 34 Pages
| |||
AMD
Table 4. Am29F100 Command Definitions (Notes 1–5)
Command
Sequence
Read/Reset
Reset/Read
Reset/Read
Autoselect
Program
Chip Erase
Sector Erase
Erase Suspend
Erase Resume
Bus
Write
Cycles
Req’d
First Bus
Write Cycle
Addr Data
Second Bus
Write Cycle
Addr Data
Third Bus
Write Cycle
Addr Data
Fourth Bus
Read/Write
Cycle
Addr
Data
Fifth Bus Sixth Bus
Write Cycle Write Cycle
Addr Data Addr Data
1 XXXXH F0H
Word
3 5555H AAH 2AAAH 55H 5555H F0H RA RD
Byte
AAAAH
5555H
AAAAH
Word
3 5555H AAH 2AAAH 55H 5555H 90H 01H 22D9H (T
Device ID)
22DFH (B
Device ID)
Byte
AAAAH
5555H
AAAAH
D9H (T
Device ID)
DFH (B
Device ID)
Word/Byte
00H 01H (T/B
Manuf. ID)
Word
4 5555H AAH 2AAAH 55H 5555H A0H PA PD
Byte
AAAAH
5555H
AAAAH
Word
6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH
2AAAH 55H 5555H 10H
Byte
AAAAH
5555H
AAAAH
AAAAH
5555H
AAAAH
Word
6 5555H AAH 2AAAH 55H 5555H 80H 5555H AAH
2AAAH 55H SA 30H
Byte
AAAAH
5555H
AAAAH
AAAAH
5555H
1 XXXXH BOH
1 XXXXH 30H
Notes:
1. Bus operations are defined in Table 1.1 and 1.2.
2. RA = Address of the memory location to be read.
PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WE pulse.
SA = Address of the sector to be erased. The combination of A15, A14, A13, and A12 will uniquely select any sector.
3. RD = Data read from location RA during read operation.
PD = Data to be programmed at location PA. Data is latched on the rising edge of WE.
4. Reading from non-erasing sectors is allowed in the Erase Suspend mode.
5. The system should generate the following address patterns:
Word Mode: 5555H or 2AAAH to addresses A0 – A14
Byte Mode: AAAAH or 5555H to addresses A-1 – A14.
Read/Reset Command
The read or reset operation is initiated by writing the
read/reset command sequence into the command reg-
ister. Microprocessor read cycles retrieve array data
from the memory. The device remains enabled for reads
until the command register contents are altered.
The device will automatically power-up in the read/reset
state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will
retrieve array data. This default value ensures that no
spurious alteration of the memory content occurs during
the power transition. Refer to the AC Read Characteris-
tics and Waveforms for the specific timing parameters.
Autoselect Command
Flash memories are intended for use in applications
where the local CPU can alter memory contents. As
such, manufacture and device codes must be
accessible while the device resides in the target system.
PROM programmers typically access the signature
codes by raising A9 to a high voltage. However, multi-
plexing high voltage onto the address lines is not gener-
ally a desirable system design practice.
The device contains an autoselect command operation
to supplement traditional PROM programming method-
ology. The operation is initiated by writing the autoselect
command sequence into the command register. Follow-
ing the command write, a read cycle from address
XX00H retrieves the manufacture code of 01H. A read
cycle from address XX01H returns the device code
(Am29F100T = D9H and Am29F100B = DFH for x8
mode; Am29F100T = 22D9H and Am29F100B =
22DFH for x16 mode) (see Tables 2.1 and 2.2).
All manufacturer and device codes will exhibit odd parity
with DQ7 defined as the parity bit.
1-42
Am29F100T/Am29F100B
Share Link: