25L3206E データシートの表示（PDF） - Unspecified

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25L3206E

32M-BIT [x 1 / x 2] CMOS SERIAL FLASH

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MX25L3206E

(20) Read SFDP Mode (RDSFDP)...................................................................................................................... 24

Read Serial Flash Discoverable Parameter (RDSFDP) Sequence..................................................................... 24

Table a. Signature and Parameter Identification Data Values ............................................................................ 25

Table b. Parameter Table (0): JEDEC Flash Parameter Tables.......................................................................... 26

Table c. Parameter Table (1): Macronix Flash Parameter Tables........................................................................ 28

POWER-ON STATE.................................................................................................................................................... 30

ELECTRICAL SPECIFICATIONS............................................................................................................................... 31

ABSOLUTE MAXIMUM RATINGS...................................................................................................................... 31

Figure 3. Maximum Negative Overshoot Waveform........................................................................................... 31

CAPACITANCE TA = 25°C, f = 1.0 MHz.............................................................................................................. 31

Figure 4. Maximum Positive Overshoot Waveform............................................................................................. 31

Figure 5. INPUT TEST WAVEFORMS AND MEASUREMENT LEVEL............................................................... 32

Figure 6. OUTPUT LOADING............................................................................................................................ 32

Table 8. DC CHARACTERISTICS....................................................................................................................... 33

Table 9. AC CHARACTERISTICS....................................................................................................................... 34

Timing Analysis......................................................................................................................................................... 35

Figure 7. Serial Input Timing............................................................................................................................... 35

Figure 8. Output Timing....................................................................................................................................... 35

Figure 9. Hold Timing.......................................................................................................................................... 36

Figure 10. WP# Disable Setup and Hold Timing during WRSR when SRWD=1................................................ 36

Figure 11. Write Enable (WREN) Sequence (Command 06).............................................................................. 37

Figure 12. Write Disable (WRDI) Sequence (Command 04)............................................................................... 37

Figure 13. Read Status Register (RDSR) Sequence (Command 05)................................................................. 38

Figure 14. Write Status Register (WRSR) Sequence (Command 01)................................................................ 38

Figure 15. Read Data Bytes (READ) Sequence (Command 03)....................................................................... 38

Figure 16. Read at Higher Speed (FAST_READ) Sequence (Command 0B).................................................... 39

Figure 17. Dual Output Read Mode Sequence (Command 3B).......................................................................... 40

Figure 18. Sector Erase (SE) Sequence (Command 20)................................................................................... 40

Figure 19. Block Erase (BE) Sequence (Command 52 or D8)........................................................................... 40

Figure 20. Chip Erase (CE) Sequence (Command 60 or C7)............................................................................ 41

Figure 21. Page Program (PP) Sequence (Command 02)................................................................................. 41

Figure 22. Deep Power-down (DP) Sequence (Command B9).......................................................................... 42

Figure 23. Release from Deep Power-down (RDP) Sequence (Command AB)................................................ 42

Figure 24. Read Electronic Signature (RES) Sequence (Command AB)........................................................... 42

Figure 25. Read Identification (RDID) Sequence (Command 9F)....................................................................... 43

Figure 26. Read Electronic Manufacturer & Device ID (REMS) Sequence (Command 90)............................... 43

Figure 27. Read Security Register (RDSCUR) Sequence (Command 2B)......................................................... 44

Figure 28. Write Security Register (WRSCUR) Sequence (Command 2F)........................................................ 44

Figure 29. Program/Erase flow with read array data........................................................................................... 45

P/N: PM1568

REV. 1.5, DEC. 04, 2013

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