QS6400 データシートの表示（PDF） - Unspecified

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QS6400

Advanced ADPCM SOUND DSP for Mobile

Unspecified 

QS6400

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4- 3 Detail pin descriptions.

POWER SUPPLY PINS

- VDD ( 4,27 )

- These pins are connected to a normal power supply.

- VSS ( 3,28,31 )

- These pins are GNDs of power.

- PVDD( 34 ), EVDD( 40 ),PVSS (37)

- PVDD is VDD for PWM block. It's capable of driving a voltage of MAX 4.2V down to 3.3V.

- EVDD is VDD for EarPhone block. Its range covers 3.6V to 2.7V.

- PVSS is PWM block GND.

POWER RESET

- MRSTB ( 21 )

- Reset is accomplished by holding the MRSTB pin low for at least 60 oscillator periods

while the oscillator is running. To ensure proper power-on reset, the MRSTB pin must be

high long enough to allow the oscillator time to start up plus 40 oscillator periods.

- RESET should be free from glitch noise.

- At power-on, the voltage on VDD and MRSTB must come up at the same time for a proper

start-up.

- After RESET, all registers and internal RAM are initialized to "0x00“

 AUDIO INTERFACE

- Support to playback ADPCM wavefile(2 Channels)

- Separate wave volume control(0~255).

Gayagum/Daegum/Haegum/Taepyoungso/Buk/Ggwengary/Jang-goo/Jing.

 CPU INTERFACING

- 14 Wires parallel interfacing

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