DA28F320J5-100 データシートの表示（PDF） - Intel
部品番号
コンポーネント説明
メーカー
DA28F320J5-100 Datasheet PDF : 53 Pages
| |||
INTEL® StrataFlash™ MEMORY TECHNOLOGY, 32 AND 64 MBIT
E
Date of
Revision
09/01/97
09/17/97
12/01/97
1/31/98
3/23/98
7/13/98
Version
REVISION HISTORY
Description
-001
-002
-003
-004
-005
-006
Original Version
Modifications made to cover sheet
VCC/GND Pins Converted to No Connects specification change added
ICCS, ICCD, ICCW, and ICCE specification change added
Order Codes specification change added
The µBGA* chip-scale package in Figure 2 was changed to a 52-ball
package and appropriate documentation added. The 64-Mb µBGA
package dimensions were changed in Figure 2. Changed Figure 4 to read
SSOP instead of TSOP.
32-Mbit Intel StrataFlash memory read access time added. The number
of block erase cycles was changed. The write buffer program time was
changed. The operating temperature was changed. A read parameter
was added. Several program, erase, and lock-bit specifications were
changed. Minor documentation changes were made as well. Datasheet
designation changed from Advance Information to Preliminary.
Intel StrataFlash memory 32-Mb µBGA package removed. tEHEL read
specification reduced. Table 4 was modified. The Ordering Information
was updated.
4
PRELIMINARY
Share Link: 