73S1210F データシートの表示（PDF） - Teridian Semiconductor Corporation

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73S1210F

Self-Contained Smart Card Reader with PINpad and Power Management

Teridian Semiconductor Corporation 

73S1210F Data Sheet

DS_1210F_001

Pin Name

Description

RXTX

43 27 IO

ICE control.

ERST

38 23 IO

ICE control.

ISBR

3

IO

ICE control.

TCLK

39 24 I

ICE control.

ANA_IN 15

AI Figure 38 Analog input pin. This signal goes to a programmable

comparator and is used to sense the value of an external

voltage.

SEC

2

I Figure 37 Input pin for use in programming security fuse. It should be

connected to ground when not in use.

TEST

51 32 DI Figure 37 Test pin, should be connected to ground

LED0

45

IO Figure 36 Special output driver, programmable pull-down current to

drive LED. May also be used as an input.

VDD

68 3 PSO

28 16

40 25

VDD supply output pin. A 0.1µF capacitor is recommended

at each VDD pin.

N/C

GND

7

8

26

27

9 2 GND

25 8

42 15

67 26

No connect.

General ground supply pins for all IO and logic circuits.

RESET

14 I

Figure 32

Reset input, positive assertion. Resets logic and registers

to default condition. Note: to insure proper reset operation

after VDD is turned on by application of VBUS power or

activation of the ON/OFF switch, external reset circuitry

must generate a proper reset signal to the 73S1210F. This

can be accomplished via a simple RC network.

* See the figures in the Equivalent Circuits section.

10

Rev. 1.4

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