DSPIC30F6012 データシートの表示（PDF） - Microchip Technology

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DSPIC30F6012

High Performance Digital Signal Controllers

Microchip Technology 

dsPIC30F6011/6012/6013/6014

FIGURE 1-1:

dsPIC30F6011/6012 BLOCK DIAGRAM

Interrupt

Controller

24

Address Latch

Program Memory

(144 Kbytes)

Data EEPROM

(4 Kbytes)

Data Latch

Y Data Bus

PSV & Table

Data Access

24 Control Block

8

16

24

PCU PCH PCL

Program Counter

Stack

Control

Logic

Loop

Control

Logic

X Data Bus

16 16

16

16

Data Latch Data Latch

Y Data

RAM

(4 Kbytes)

Address

X Data

RAM

(4 Kbytes)

Address 16

Latch

Latch

16 16

16

Y AGU

X RAGU

X WAGU

Effective Address

16

24

16

Instruction

Decode &

Control

Control Signals

to Various Blocks

OSC1/CLKI

Timing

Generation

MCLR

VDD, VSS

AVDD, AVSS

ROM Latch

16

IR

Decode

16

16 x 16

W Reg Array

16 16

Power-up

Timer

Oscillator

Start-up Timer

POR/BOR

Reset

Watchdog

Timer

Low Voltage

Detect

DSP

Engine

Divide

Unit

ALU<16>

16

16

CAN1,

CAN2

12-bit ADC

Input

Capture

Output

Compare

I2C

Module

Module

PORTB

PORTC

PORTD

Timers

DCI

SPI1,

SPI2

UART1,

UART2

PORTF

PORTG

PGD/EMUD/AN0/CN2/RB0

PGC/EMUC/AN1/CN3/RB1

AN2/SS1/LVDIN/CN4/RB2

AN3/CN5/RB3

AN4/CN6/RB4

AN5/CN7/RB5

AN6/OCFA/RB6

AN7/RB7

AN8/RB8

AN9/RB9

AN10/RB10

AN11/RB11

AN12/RB12

AN13/RB13

AN14/RB14

AN15/OCFB/CN12/RB15

T2CK/RC1

T3CK/RC2

EMUD1/SOSCI/CN1/RC13

EMUC1/SOSCO/T1CK/CN0/RC14

OSC2/CLKO/RC15

EMUC2/OC1/RD0

EMUD2/OC2/RD1

OC3/RD2

OC4/RD3

OC5/CN13/RD4

OC6/CN14/RD5

OC7/CN15/RD6

OC8/CN16/RD7

IC1/RD8

IC2/RD9

IC3/RD10

IC4/RD11

C1RX/RF0

C1TX/RF1

U1RX/RF2

U1TX/RF3

U2RX/CN17/RF4

U2TX/CN18/RF5

EMUC3/SCK1/INT0/RF6

SDI1/RF7

EMUD3/SDO1/RF8

C2RX/RG0

C2TX/RG1

SCL/RG2

SDA/RG3

SCK2/CN8/RG6

SDI2/CN9/RG7

SDO2/CN10/RG8

SS2/CN11/RG9

CSDI/RG12

CSDO/RG13

CSCK/RG14

COFS/RG15

DS70117C-page 8

Preliminary

 2004 Microchip Technology Inc.

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