74AHCT125BQ データシートの表示（PDF） - NXP Semiconductors.
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74AHCT125BQ Datasheet PDF : 15 Pages
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NXP Semiconductors
4. Functional diagram
74AHC125; 74AHCT125
Quad buffer/line driver; 3-state
2 1A
1Y 3
1 1OE
5 2A
2Y 6
4 2OE
9 3A
3Y 8
10 3OE
12 4A
4Y 11
13 4OE
mna228
Fig 1. Logic symbol
2
1
3
1
EN1
5
6
4
9
8
10
12
11
13
mna229
Fig 2. IEC logic symbol
5. Pinning information
5.1 Pinning
nA
nY
nOE
mna227
Fig 3. Logic diagram (one buffer)
1OE 1
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND 7
74AHC125
74AHCT125
14 VCC
13 4OE
12 4A
11 4Y
10 3OE
9 3A
8 3Y
001aae755
Fig 4. Pin configuration SO14 and TSSOP14
74AHC125
74AHCT125
terminal 1
index area
1A 2
1Y 3
2OE 4
2A 5
2Y 6
GND(1)
13 4OE
12 4A
11 4Y
10 3OE
9 3A
001aah082
Transparent top view
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as
a supply pin or input.
Fig 5. Pin configuration DHVQFN14
74AHC_AHCT125_4
Product data sheet
Rev. 04 — 11 January 2008
© NXP B.V. 2008. All rights reserved.
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