74LVC08APW-Q100 データシートの表示（PDF） - NXP Semiconductors.

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74LVC08APW-Q100

Quad 2-input AND gate

NXP Semiconductors. 

Nexperia

74LVC08A-Q100

Quad 2-input AND gate

7. Limiting values

Table 4. Limiting values

In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).

Symbol

Parameter

Conditions

Min

Max Unit

VCC

supply voltage

IIK

input clamping current

VI < 0 V

VI

input voltage

IOK

output clamping current

VO > VCC or VO < 0 V

VO

output voltage

output HIGH or LOW-state

IO

output current

VO = 0 V to VCC

0.5

50

[1] 0.5

-

[2] 0.5

-

+6.5 V

-

mA

+6.5 V

50

mA

VCC + 0.5 V

50

mA

ICC

IGND

Ptot

Tstg

supply current

ground current

total power dissipation

storage temperature

Tamb = 40 C to +125 C

-

100

[3]

-

65

100

mA

-

mA

500

mW

+150 C

[1] The minimum input voltage ratings may be exceeded if the input current ratings are observed.

[2] The output voltage ratings may be exceeded if the output current ratings are observed.

[3] For SO14 packages: above 70 C derate linearly with 8 mW/K.

For TSSOP14 packages: above 60 C derate linearly with 5.5 mW/K.

For DHVQFN14 packages: above 60 C derate linearly with 4.5 mW/K.

8. Recommended operating conditions

Table 5.

Symbol

VCC

VI

VO

Tamb

t/V

Recommended operating conditions

Parameter

Conditions

supply voltage

functional

input voltage

output voltage

output HIGH or LOW-state

ambient temperature

input transition rise and fall rate VCC = 1.65 V to 2.7 V

VCC = 2.7 V to 3.6 V

Min Typ Max Unit

1.65

-

3.6 V

1.2

-

-V

0

-

5.5 V

0

-

VCC V

40

-

+125 C

0

-

20 ns/V

0

-

10 ns/V

74LVC08A_Q100

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 2 — 19 April 2016

© Nexperia B.V. 2017. All rights reserved

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