74LVC109D,118 データシートの表示（PDF） - NXP Semiconductors.
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74LVC109D,118 Datasheet PDF : 18 Pages
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Philips Semiconductors
Dual JK flip-flop with set and reset;
positive-edge trigger
Product specification
74LVC109
SYMBOL
PARAMETER
TEST CONDITIONS
OTHER
VCC (V)
Tamb = −40 to 125 °C
VIH
HIGH-level input
voltage
VIL
LOW-level input
voltage
VOH
VOL
ILI
ICC
∆ICC
HIGH-level output
voltage
LOW-level output
voltage
input leakage current
quiescent supply
current
additional quiescent
supply current per
input pin
VI = VIH or VIL
IO = −100 µA
IO = −12 mA
IO = −12 mA
IO = −24 mA
VI = VIH or VIL
IO = 100 µA
IO = 12 mA
IO = 24 mA
VI = 5.5 V or GND
VI = VCC or GND;
IO = 0 A
VI = VCC − 0.6 V;
IO = 0 A
1.2
2.7 to 3.6
1.2
2.7 to 3.6
2.7 to 3.6
2.7
3.0
3.0
2.7 to 3.6
2.7
3.0
3.6
3.6
2.7 to 3.6
Note
1. All typical values are measured at Tamb = 25 °C.
MIN.
TYP.
VCC
−
2.0
−
−
−
−
−
VCC − 0.3 −
VCC − 0.65 −
VCC − 0.75 −
VCC − 1.0 −
−
−
−
−
−
−
−
−
−
−
−
−
MAX. UNIT
−
V
−
V
GND
V
0.8
V
−
V
−
V
−
V
−
V
0.3
V
0.6
V
0.8
V
±20
µA
40
µA
5 000
µA
2004 Mar 18
8
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