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74LVC821A データシートの表示(PDF) - NXP Semiconductors.

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74LVC821A Datasheet PDF : 20 Pages
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NXP Semiconductors
74LVC821A
10-bit D-type flip-flop; 5 V tolerance; positive-edge trigger; 3-state
VI
OE input
GND
VCC
Qn output
LOW- to - OFF
OFF- to - LOW
VOL
VOH
Qn output
HIGH- to - OFF
OFF- to - HIGH
GND
VM
t PLZ
VM
t PZL
t PHZ
VX
VY
outputs
enabled
VM
t PZH
outputs
disabled
VM
outputs
enabled
mgu775
Fig 9.
Measurement points are given in Table 8.
VOL and VOH are the typical output voltage levels that occur with the output load.
3-state enable and disable times
Table 8. Measurement points
Supply voltage Input
VCC
1.2 V
1.65 V to 1.95 V
2.3 V to 2.7 V
2.7 V
VI
VCC
VCC
VCC
2.7 V
3.0 V to 3.6 V
2.7 V
VM
0.5 VCC
0.5 VCC
0.5 VCC
1.5 V
1.5 V
Output
VM
0.5 VCC
0.5 VCC
0.5 VCC
1.5 V
1.5 V
VX
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.15 V
VOL + 0.3 V
VOL + 0.3 V
VY
VOH 0.15 V
VOH 0.15 V
VOH 0.15 V
VOH 0.3 V
VOH 0.3 V
74LVC821A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 23 November 2012
© NXP B.V. 2012. All rights reserved.
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