AD5252BRU1-RL7(Rev0) データシートの表示（PDF） - Analog Devices

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AD5252BRU1-RL7
(Rev.:Rev0)

Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers

Analog Devices 

AD5251/AD5252

INTERFACE TIMING CHARACTERISTICS

Guaranteed by design, not subject to production test. See Figure 3 for location of measured values. All input control voltages are

specified with tR = tF = 2.5 ns (10% to 90% of 3 V), and timed from a voltage level of 1.5 V. Switching characteristics are measured

using both VDD = 3 V and 5 V.

Table 3. Interface Timing and EEMEM Reliability Characteristics (All Parts).

Parameter

Symbol

Conditions

Min Typ Max Unit

INTERFACE TIMING

SCL Clock Frequency

fSCL

tBUF Bus Free Time between STOP and t1

START

400 kHz

1.3

µs

tHD;STA Hold Time (Repeated START)

t2

After this period, the first clock pulse 0.6

µs

is generated

tLOW Low Period of SCL Clock

t3

1.3

µs

tHIGH High Period of SCL Clock

t4

0.6

µs

tSU;STA Setup Time For START Condition

t5

0.6

µs

tHD;DAT Data Hold Time

t6

0

0.9 µs

tSU;DAT Data Setup Time

t7

100

ns

tF Fall Time of Both SDA and SCL Signals t8

300 ns

tR Rise Time of Both SDA and SCL Signals t9

300 ns

tSU;STO Setup Time for STOP Condition

t10

0.6

µs

EEMEM Data Storing Time

tEEMEM_STORE

26

ms

EEMEM Data Restoring Time at

tEEMEM_RESTORE1

VDD rise time dependent. Measure

300

µs

Power-On1

without decoupling capacitors at VDD

and VSS.

EEMEM Data Restoring Time Upon

tEEMEM_RESTORE2

Restore Command or RESET Operation1

VDD = 5 V

300

µs

EEMEM Rewritable Time (delay time after tEEMEM_REWRITE

Power On or RESET before EEMEM can

be written)

540

µs

FLASH/EE MEMORY RELIABILITY

Endurance2

Data Retention3

100

100

kCycles

Years

1 During power-up, all outputs preset to midscale before restoring to the final EEMEM contents. RDAC0 has the shortest, whereas RDAC3 has the longest EEMEM data

restoring time.

2 Retention lifetime equivalent at junction temperature TJ = 55°C per JEDEC Std. 22, Method A117. Retention lifetime based on an activation energy of 0.6 eV derates

with junction temperature.

3 When the part is not in operation, the SDA and SCL pins should be pulled to high. When these pins are pulled to low, the I2C interface at these pins conducts current of

about 0.8 mA at VDD = 5.5 V and 0.2 mA at VDD = 2.7 V.

Rev. 0 | Page 7 of 28

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