AD5251(Rev0) データシートの表示（PDF） - Analog Devices

部品番号

コンポーネント説明

メーカー

AD5251
(Rev.:Rev0)

Dual 64-and 256-Position I2C Nonvolatile Memory Digital Potentiometers

Analog Devices 

AD5251/AD5252

I2C INTERFACE GENERAL DESCRIPTION

FROM MASTER TO SLAVE

FROM SLAVE TO MASTER

S = START CONDITION

P = STOP CONDITION

A = ACKNOWLEDGE (SDA LOW)

A = NOT ACKNOWLEDGE (SDA HIGH)

R/W = READ ENABLE AT HIGH AND WRITE ENABLE AT LOW

S

SLAVE ADDRESS

(7-BIT)

R/W A

INSTRUCTIONS

(8-BIT)

A

DATA

(8-BIT)

0 WRITE

DATA TRANSFERRED

(N BYTES + ACKNOWLEDGE)

Figure 4. I2C—Master Writing Data to Slave

A/A P

S

SLAVE ADDRESS

(7-BIT)

R/W A

DATA

(8-BIT)

A

DATA

(8-BIT)

1 READ

DATA TRANSFERRED

(N BYTES + ACKNOWLEDGE)

Figure 5. I2C—Master Reading Data from Slave

AP

S

SLAVE ADDRESS

(7-BIT)

R/W A

DATA

A/A S

SLAVE ADDRESS

R/W A

DATA

A/A P

READ OR WRITE

(N BYTES +

ACKNOWLEDGE)

REPEATED START

READ

OR WRITE

(N BYTES +

ACKNOWLEDGE)

DIRECTION OF TRANSFER MAY

CHANGE AT THIS POINT

Figure 6. I2C—Combined Write/Read

Rev. 0 | Page 10 of 28

Share Link: