ADG5433 データシートの表示（PDF） - Analog Devices
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ADG5433 Datasheet PDF : 24 Pages
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ADG5433/ADG5434
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
Data Sheet
VDD 1
S1A 2
D1 3
S1B 4
S2B 5
D2 6
S2A 7
IN2 8
16 GND
15 IN1
ADG5433
TOP VIEW
(Not to Scale)
14 EN
13 VSS
12 S3B
11 D3
10 S3A
9 IN3
Figure 3. ADG5433 TSSOP Pin Configuration
D1 1
S1B 2
S2B 3
D2 4
ADG5433
TOP VIEW
(Not to Scale)
12 EN
11 VSS
10 S3B
9 D3
NOTES
1. EXPOSED PAD IS TIED TO SUBSTRATE, VSS.
Figure 4. ADG5433 LFCSP_WQ Pin Configuration
Table 8. ADG5433 Pin Function Descriptions
Pin No.
TSSOP LFCSP_WQ Mnemonic Description
1
15
VDD
Most Positive Power Supply Potential.
2
16
S1A
Source Terminal 1A. This pin can be an input or an output.
3
1
D1
Drain Terminal 1. This pin can be an input or an output.
4
2
S1B
Source Terminal 1B. This pin can be an input or an output.
5
3
S2B
Source Terminal 2B. This pin can be an input or an output.
6
4
D2
Drain Terminal 2. This pin can be an input or an output.
7
5
S2A
Source Terminal 2A. This pin can be an input or an output.
8
6
IN2
Logic Control Input 2.
9
7
IN3
Logic Control Input 3.
10
8
S3A
Source Terminal 3A. This pin can be an input or an output.
11
9
D3
Drain Terminal 3. This pin can be an input or an output.
12
10
S3B
Source Terminal 3B. This pin can be an input or an output.
13
11
VSS
Most Negative Power Supply Potential. In single-supply applications, this pin can be connected to
ground.
14
12
EN
Active Low Digital Input. When high, the device is disabled and all switches are off. When low, INx
logic inputs determine the on switches.
15
13
IN1
Logic Control Input 1.
16
14
GND
Ground (0 V) Reference.
EP
Exposed The exposed pad is connected internally. For increased reliability of the solder joints and maximum
Pad
thermal capability, it is recommended that the pad be soldered to the substrate, VSS.
Table 9. ADG5433 Truth Table
EN
INx
SxA
SxB
1
X
Off
Off
0
0
Off
On
0
1
On
Off
Rev. C | Page 10 of 24
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