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SPW47N65C3 データシートの表示(PDF) - Infineon Technologies

部品番号
コンポーネント説明
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SPW47N65C3
Infineon
Infineon Technologies Infineon
SPW47N65C3 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Parameter
Symbol Conditions
Dynamic characteristics
Input capacitance
Output capacitance
C iss
C oss
Effective output capacitance, energy
related5)
C o(er)
Effective output capacitance, time
related6)
Turn-on delay time
Rise time
Turn-off delay time
Fall time
C o(tr)
t d(on)
tr
t d(off)
tf
V GS=0 V, V DS=25 V,
f =1 MHz
V GS=0 V, V DS=0 V
to 480 V
V DD=400 V,
V GS=10 V, I D=47 A,
R G=5.6
SPW47N65C3
min.
Values
typ.
Unit
max.
-
7000
- pF
-
2300
-
-
270
-
-
490
-
-
100
- ns
-
27
-
-
210
-
-
14
-
Gate Charge Characteristics
Gate to source charge
Gate to drain charge
Gate charge total
Gate plateau voltage
Reverse Diode
Diode forward voltage
Reverse recovery time
Reverse recovery charge
Peak reverse recovery current
Q gs
-
35
- nC
Q gd
V DD=480 V, I D=47 A,
-
120
-
Qg
V GS=0 to 10 V
-
255
-
V plateau
-
5.5
-V
V SD
V GS=0 V, I F=47 A,
T j=25 °C
t rr
Q rr
V R=480 V, I F=I S,
di F/dt =100 A/µs
I rrm
-
0.9
1.2 V
-
640
- ns
-
19
- µC
-
56
-A
1) J-STD20 and JESD22
2) Pulse width t p limited by T j,max
3) Repetitive avalanche causes additional power losses that can be calculated asP AV=E AR*f.
5) C o(er) is a fixed capacitance that gives the same stored energy as C oss while V DS is rising from 0 to 80% V DSS.
6) C o(tr) is a fixed capacitance that gives the same charging time as C oss while V DS is rising from 0 to 80% V DSS.
Rev. 1.2
page 3
2008-02-12
Please note the new package dimensions arccording to PCN 2009-134-A

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