74LVC541AD データシートの表示（PDF） - NXP Semiconductors.
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74LVC541AD Datasheet PDF : 17 Pages
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Nexperia
74LVC541A
Octal buffer/line driver with 5 V tolerant inputs/outputs; 3-state
5. Pinning information
5.1 Pinning
OE1 1
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND 10
74LVC541A
20 VCC
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
11 Y7
001aad115
Fig 3. Pin configuration for SO20 and (T)SSOP20
5.2 Pin description
Table 2.
Symbol
OE1
A[0:7]
GND
Y[0:7]
OE2
VCC
Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
terminal 1
index area
74LVC541A
A0 2
A1 3
A2 4
A3 5
A4 6
A5 7
A6 8
A7 9
GND (1)
19 OE2
18 Y0
17 Y1
16 Y2
15 Y3
14 Y4
13 Y5
12 Y6
001aad 116
Transparent top view
(1) This is not a supply pin. The substrate is attached to
this pad using conductive die attach material. There
is no electrical or mechanical requirement to solder
this pad. However, if it is soldered, the solder land
should remain floating or be connected to GND.
Fig 4. Pin configuration for DHVQFN20
Description
output enable input (active LOW)
data input
ground (0 V)
bus output
output enable input (active LOW)
supply voltage
74LVC541A
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 4 — 25 November 2011
© Nexperia B.V. 2017. All rights reserved
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