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NRF8002-R1Q32-R データシートの表示(PDF) - Unspecified

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NRF8002-R1Q32-R Datasheet PDF : 46 Pages
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nRF8002 Product Specification
4
Operation
This chapter describes the power-up sequence for nRF8002 and the modes it can enter and also a state
diagram that illustrates the operating states and their behavior. Configuration data can be stored in RAM or
non-volatile memory (also called One Time Programmable memory, or OTP) in nRF8002.
4.1
Power up
Power up is defined as when nRF8002 is powered up for the first time (the battery is inserted) or the chip is
reset. When nRF8002 is powered up its behavior depends on whether a custom configuration has been
pre-programmed into the non-volatile memory (OTP). If the OTP contains a valid configuration, nRF8002
starts with these configuration settings and is ready for operational use.
In Configuration mode, nRF8002 can receive the configuration generated by nRFgo Studio. The nRF8002
configuration decides profile, application and I/O behavior. RAM is used during development to enable
repeated configuration downloads. Each time nRF8002 is reset, or power is removed, it returns to a non-
configured state and you can choose to enter DTM or download a new configuration.
If there is no valid configuration available in OTP, nRF8002 will start in either Direct Test Mode (DTM) or
Configuration mode, depending on the first byte received on the UART:
• If the first byte received on the UART is 0xFF, nRF8002 starts in Configuration mode.
• If the first byte received on the UART is NOT 0xFF, nRF8002 starts in DTM mode.
See chapter 7 on page 32 for more information on DTM.
Note: When the chip is in DTM or Configuration mode it will rapidly drain the battery, as it does not
use power management in these modes.
Once development is finished final configuration can be downloaded to non-volatile memory (OTP) from
nRFgo studio or saved to file for use in factory programming tools.
Note: If configuration is programmed into OTP, DTM mode is no longer accessible.
When the configuration is available in OTP, the UART is disabled.
Revision 1.1
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