MAX769 データシートの表示（PDF） - Maxim Integrated
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MAX769 Datasheet PDF : 16 Pages
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2 or 3-Cell, Step-Up/Down,
Two-Way Pager System IC
ELECTRICAL CHARACTERISTICS (continued)
(OUT = 3.0V, BATT = 3.6V, TA = -40°C to +85°C, unless otherwise noted. Typical values are at TA = +25°C.) (Note 1)
PARAMETER
CH2 Input Hysteresis (Note 16)
CH0 Input Current
CONDITIONS
CH0 = 0.2V to 1.27V
MIN
4
-100
TYP
8
MAX
16
100
CH Comparator Response Time
(Note 16)
10mV overdrive
0.6
1.0
UNITS
mV
nA
µs
Note 1: Specifications to -40°C are guaranteed by design, not production tested.
Note 2: This is not a tested parameter, since the IC is powered from OUT, not BATT.
Note 3: Minimum start-up voltage is tested by determining when the LX pins can draw at least 15mA for 0.5µs (min) at a 285kHz
(min) repetition rate. This guarantees that the IC will deliver at least 200µA at the OUT pin.
Note 4: This supply current is drawn from the OUT pin. Current drain from the battery depends on voltages at BATT and OUT and
on the DC-to-DC converter’s efficiency.
Note 5: Current into BATT pin in addition to the supply current at OUT. This current is roughly constant from Coast to Run Mode.
Note 6: Current into NICD pin when NICD isn’t being charged and isn’t regulating OUT.
Note 7: Current into NICD pin when NICD is regulating OUT. Doesn’t include current drawn from OUT by the rest of the circuit.
Measured by setting the OUT regulation point to 2.8V and holding OUT at 3.0V.
Note 8: Current into the NICD pin when BATT and OUT are both at 0V. This test guarantees that NICD won’t draw significant cur-
rent when the main battery is removed and backup is not activated.
Note 9: Serial-interface timing specifications are not tested and are provided for design guidance only. Serial-interface functionali-
ty is tested by clocking data in at 5MHz with a 50% duty-cycle clock and checking for proper operation. With OUT set
below 2.5V, the serial-interface clock frequency should be reduced to 1MHz to ensure proper operation.
Note 10: This specification is not directly tested but is guaranteed by correlation to LX on-resistance and current-limit tests.
Note 11: Measured by using the internal feedback network and Coast-Mode error comparator to regulate OUT. Doesn’t include
ripple voltage due to inductor currents.
Note 12: Measured by using the internal feedback network and Run-Mode error comparator to regulate OUT. Doesn’t include ripple
voltage due to inductor currents.
Note 13: Uses the OUT measurement techniques described for the OUT error, Coast Mode, and OUT error Run Mode specifica-
tions.
Note 14: The on-resistance is for either LX1 or LX2.
Note 15: PLL acquisition characteristics depend on the impedance at the FILT pin. The specification is not tested and is provided
for design guidance only.
Note 16: The limits in this specification are not guaranteed and are provided for design guidance only.
(TA = +25°C, unless otherwise noted.)
EFFICIENCY vs. LOAD CURRENT
(RUN MODE, VOUT = 3.0V)
100
VIN = 1.5V VIN = 2.0V
90
80
Typical Operating Characteristics
EFFICIENCY vs. LOAD CURRENT
(COAST MODE, VOUT = 3.0V)
100
VIN = 5.0V
90 VIN = 3.5V
VIN = 2.5V
VIN = 2.0V
80 VIN = 1.5V
EFFICIENCY vs. LOAD CURRENT
(COAST MODE, VOUT = 2.4V)
100
90
VIN = 5.0V
VIN = 3.5V
VIN = 2.5V
80
VIN = 2.0V
VIN = 1.5V
70
60
50
1
VIN = 5.0V
VIN = 3.5V
VIN = 2.5V
10
LOAD CURRENT (mA)
70
70
60
60
50
50
100
0.01
0.1
1
10
100
0.01
0.1
1
10
100
LOAD CURRENT (mA)
LOAD CURRENT (mA)
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