HEF4046B データシートの表示（PDF） - NXP Semiconductors.
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HEF4046B Datasheet PDF : 20 Pages
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NXP Semiconductors
HEF4046B
Phase-locked loop
10. Dynamic characteristics
Table 6. Dynamic characteristics
VSS = 0 V; Tamb = 25 C; CL = 50 pF; input transition times 20 ns.
Symbol Parameter
Conditions
Phase comparators
VDD
Min
RI
input resistance
SIG_IN input; at self-bias operating point 5 V -
10 V -
15 V -
Vi(sens) input voltage
sensitivity
SIG_IN input A.C. coupled; peak-to-peak 5 V -
values; R1 = 10 k; R2 = ; C1 = 100 pF; 10 V
-
independent of the lock range
15 V -
VIL
LOW-level input
SIG_IN and COMP_IN inputs, DC
5V -
voltage
coupled LOW; full temperature range
10 V -
15 V -
VIH
HIGH-level input
SIG_IN and COMP_IN inputs, D.C.
5 V 3.5
voltage
coupled HIGH; full temperature range
10 V
7.0
15 V 11.0
IIH
HIGH-level input
SIG_IN input; at VDD
current
5V -
10 V -
15 V -
IIL
LOW-level input
SIG_IN input; at VSS
current
5V -
10 V -
15 V -
VCO
P
power dissipation
f0 = 10 kHz; R1 = 1 M; R2 = ;
5V -
VCO_IN at 0.5 VDD; see Figure 10 to 12 10 V
-
15 V -
fmax
maximum frequency VCO_IN at VDD;
R1 = 10 k; R2 = ; C1 = 50 pF
5 V 0.5
10 V 1.0
15 V 1.3
f/T
frequency variation no frequency offset (fmin = 0 Hz)
with temperature
5 V [1] -
10 V [1] -
15 V [1] -
with frequency offset (fmin > 0 Hz)
5 V [1] -
10 V [1] -
15 V [1] -
Typ Max
750 -
220 -
140 -
150 -
150 -
200 -
-
1.5
-
3.0
-
4.0
-
-
-
-
-
-
7
-
30
-
70
-
3
-
18 -
45 -
150 -
2500 -
9000 -
1.0 -
2.0 -
2.7 -
0.22 to -
0.30
0.04 to -
0.05
0.01 to -
0.05
0 to -
0.22
0 to -
0.04
0 to -
0.01
Unit
k
k
k
mV
mV
mV
V
V
V
V
V
V
A
A
A
A
A
A
W
W
W
MHz
MHz
MHz
% Hz/C
% Hz/C
% Hz/C
% Hz/C
% Hz/C
% Hz/C
HEF4046B
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 18 November 2011
© NXP B.V. 2011. All rights reserved.
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