LHF16KAP データシートの表示（PDF） - Sharp Electronics

部品番号

コンポーネント説明

メーカー

LHF16KAP

Flash Memory 16M (2MB × 8 / 1MB × 16))

Sharp Electronics 

sharp

LHF16KAP

6

2 PRINCIPLES OF OPERATION

The LH28F160S5HNS-L70 Flash memory includes

an on-chip WSM to manage block erase, full chip

erase, (multi) word/byte write and block lock-bit

configuration functions. It allows for: 100% TTL-level

control inputs, fixed power supplies during block

erase, full chip erase, (multi) word/byte write and

block lock-bit configuration, and minimal processor

overhead with RAM-Like interface timings.

After initial device power-up or return from deep

power-down mode (see Bus Operations), the device

defaults to read array mode. Manipulation of external

memory control pins allow array read, standby, and

output disable operations.

Status register, query structure and identifier codes

can be accessed through the CUI independent of the

VPP voltage. High voltage on VPP enables successful

block erase, full chip erase, (multi) word/byte write

and block lock-bit configuration. All functions

associated with altering memory contentsblock

erase, full chip erase, (multi) word/byte write and

block lock-bit configuration, status, query and

identifier codesare accessed via the CUI and

verified through the status register.

Commands are written using standard

microprocessor write timings. The CUI contents serve

as input to the WSM, which controls the block erase,

full chip erase, (multi) word/byte write and block lock-

bit configuration. The internal algorithms are

regulated by the WSM, including pulse repetition,

internal verification, and margining of data.

Addresses and data are internally latch during write

cycles. Writing the appropriate command outputs

array data, accesses the identifier codes, outputs

query structure or outputs status register data.

Interface software that initiates and polls progress of

block erase, full chip erase, (multi) word/byte write

and block lock-bit configuration can be stored in any

block. This code is copied to and executed from

system RAM during flash memory updates. After

successful completion, reads are again possible via

the Read Array command. Block erase suspend

allows system software to suspend a block erase to

read or write data from any other block. Write

suspend allows system software to suspend a (multi)

word/byte write to read data from any other flash

memory array location.

1FFFFF

1F0000

1EFFFF

1E0000

1DFFFF

1D0000

1CFFFF

1C0000

1BFFFF

1B0000

1AFFFF

1A0000

19FFFF

190000

18FFFF

180000

17FFFF

170000

16FFFF

160000

15FFFF

150000

14FFFF

140000

13FFFF

130000

12FFFF

120000

11FFFF

110000

10FFFF

100000

0FFFFF

0F0000

0EFFFF

0E0000

0DFFFF

0D0000

0CFFFF

0C0000

0BFFFF

0B0000

0AFFFF

0A0000

09FFFF

090000

08FFFF

080000

07FFFF

070000

06FFFF

060000

05FFFF

050000

04FFFF

040000

03FFFF

030000

02FFFF

020000

01FFFF

010000

00FFFF

000000

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9

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5

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3

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2

64K-byte Block

1

64K-byte Block

0

Figure 3. Memory Map

Rev. 2.0

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