NJU7707 データシートの表示（PDF） - Japan Radio Corporation

部品番号

コンポーネント説明

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NJU7707

VOLTAGE DETECTOR

Japan Radio Corporation  

NJU7706/07

Functional Description

(1) Basic operation

Supply voltage

(VDD)

Detection voltage

(VDET)

Minimum operation

voltage (VOPL)

VSS

Output voltage

(VOUT)

Hysteresis voltage

(VHYS)

(1) When supply voltage(VDD) drops below

detection voltage(VDET), Output voltage(VOUT)

Release voltage

(VDET + VHYS)

changes "H" to "L" to alert reset state.

(2) The reset state is kept while VDD is lower than

release voltage. The release voltage is a sum

of VDET and Hysterisis voltage (VHYS). Please

refer to the (*7) below.

(3) When VDD becomes higher than the release

voltage and reset release delay time fixed by

internal is past, then VOUT changes from "L" to

"H" to resume normal state.

(*7) VHYS is to avoid unstable VOUT state caused

VSS

by rapid voltage change at nearby VDET.

Delay time

(*8): C-MOS output product (NJU7707) : When VDD less than VOPL, VOUT is free of the shaded region.

(2) Description of Manual Reset

Reset signal can output independently with MR.

Logic of MR

Operation

Active "L"

Active "H"

VMR= "L" => Reset "ON"

VMR= "H" => Reset "ON"

If Manual Reset is not required, please connect MR terminal as following.

Logic of MR

Connection

Active "L"

Active "H"

Connect MR terminal to VDD or open

Connect MR terminal to GND or open

- 10 -

[CAUTION]

The specifications on this databook are only

given for information , without any guarantee

as regards either mistakes or omissions. The

application circuits in this databook are

described only to show representative usages

of the product and not intended for the

guarantee or permission of any right including

the industrial rights.

Ver.2007-08-03

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